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Jonathan Harris

Interleaving Spurs: More Math Details for Gain Mismatch

Jonathan Harris
jonharris0
jonharris0
6/19/2014 10:24:00 AM
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Slight correction
In the equation above for the interleaving spur for the gain, inside the log formula should be [(1- 1.98/2)/2].  Apologies for the error.  Thanks to a coworker for pointing this out.

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SunitaT0
SunitaT0
10/29/2013 3:13:51 AM
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Re : Interleaving Spurs: More Math Details for Gain Mismatch
Spurious performance and Achievable resolution of ADCs are strongly connected to the supreme sampling occurrence of the device. Nowadays, in mid-2013, sample rates of commercially available 16-bit massive, single-core (non-added) ADCs are restricted to 250 MS/s though 14-bit ADCs could be found up to 400 MS/s.

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More Blogs from Jonathan Harris
The topic of this blog came up while at the IMS show and one of my colleagues mentioned that I should discuss the ADIsimRF tool as a part of the series. I thought this was a marvelous idea. I’ll have to precursor this discussion with the fact that I am actually an RF guy from my previous employment at an RF company which was my first position when I graduated from college.
One of the questions that appeared on one of the IMS blog posts was about the details of the demonstration I had set up at the Analog Devices booth.
The last and final day of the show is usually has the most relaxed atmosphere and this year that proved to be the case once again. It is the shortest day of the show lasting from just 9:00 AM to 3:00 PM.
After having a pretty good first day of the show, I was looking forward to a good second day and it did not disappoint. The second day of the show on Wednesday is the longest day of the show as the exhibit hours go from 9:00 AM until 6:00 PM (day one is 9:00 AM to 5:00 PM and day three is 9:00 AM to 3:00 PM).
The IMS2015 show is already off to a great start here in sunny Phoenix, Arizona and I hope that those of you attending are enjoying it so far.
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