Home    Bloggers    Blogs    Article Archives    Messages    About Us   
Tw  |  Fb  |  In  |  Rss
Jonathan Harris

ADC Noise: How the Clock Input Can Help

Jonathan Harris
jonharris0
jonharris0
1/27/2014 8:30:26 AM
User Rank
Blogger
Re: Phase noise and Jitter
Hi amrutah, these are all great points and questions.  Indeed the clock is often overlooked when it shouldn't be.  Definitely one of the biggest contributors to noise in an ADC is the phase noise of the input clock source.  Other factors may not be as big but should not be overlooked.  The noise impact will be less from what is picked up via a poor layout than from a clock source with poor phase noise or poor spurious even.  I think you'll enjoy my next post.  I'll be looking at close in vs wideband phase noise and how they affect the ADC in different ways.  Thanks for the great comments and questions!

50%
50%
amrutah
amrutah
1/25/2014 1:57:48 PM
User Rank
Master
Phase noise and Jitter
Jonathan,

   I will be eagerly waiting for your next blog post.  How the low and high frequency components phase noise affect the ADC noise.  Different jitter that affect the ADC noise, meaning contributions of peak litter, period jitter or total accumulated jitter.

50%
50%
amrutah
amrutah
1/25/2014 1:49:27 PM
User Rank
Master
CLOCK phase noise/Jitter
Jonathan,

   I think the contribution of phase noise/jitter of the clock source is the main contributor to ADC Noise compared to the noise that the clock picks on the way to ADC. How substantial can the noise contribution be compared to the jitter?

50%
50%
amrutah
amrutah
1/25/2014 1:08:27 PM
User Rank
Master
Clock input

Yes, I agree that the clock input source can be one source of noise and usually is considered at last moment. As you mentioned modelling it as a mixer should give a good analysis upfront when dealing with the noise analysis and specification limit.

   Usually the high speed clock source will be a PLL/DLL system which cannot be placed close to the ADC, and as such having a filter makes it more viable solution.  But that increases the BOM or onchip area

50%
50%
More Blogs from Jonathan Harris
Now that we’ve had a chance to learn a bit about the tool we will take a look at using Virtual Eval to predict the performance of the AD9680-500 which has integrated digital downconverters (DDCs) and will compare simulated data to measured data.
As I mentioned in my last blog I would like to take some time in this blog to introduce you to the new online simulator tool offered by Analog Devices called Virtual Eval.
The IMS2016 IMS show has come to a close on its third and final day.
. The day started off just a little slower than yesterday but quickly picked up pace and resulted in another day of steady booth and floor traffic. I had some great questions about the products we are displaying in my demonstration as well as many questions on our other technology on display at the IMS show.
I hope that you had a chance to visit the IMS2016 show during the first day. There was a noticeable increase in floor and booth traffic compared to the show last year. Perhaps you all read my preview blog this week and decided to come and check out our great demonstrations at the Analog Devices booth!
flash poll
educational resources
 
follow Planet Analog on Twitter
Planet Analog Twitter Feed
like us on facebook
our partners
Planet Analog
About Us     Contact Us     Help     Register     Twitter     Facebook     RSS