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Jonathan Harris

ADC Noise: The Clock Input & Phase Noise, Part 3 – Test Setup

Jonathan Harris
jonharris0
jonharris0
4/29/2014 8:02:29 PM
User Rank
Blogger
Re: Two PCB –Phase/Clock Noise
Hi DaeJ, the AD9523 phase noise will defintely be affected by the jitter of its reference source.  The point here in this blog was not to evaluate the AD9523 jitter performance but rather to look at the effect of the output jitter (phase noise) on the SNR of the AD9643.  Also, you have a very good point with the PCB.  It is always important to consider good design practices when designing PCBs such that additional noise from other sources on the PCB do not impact the noise in the ADC.  I'd recommend looking back over some of my blogs related to ADC noise for some nuggets along those lines.  Thanks for the great comments!

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DaeJ
DaeJ
4/19/2014 6:50:52 PM
User Rank
Master
Two PCB –Phase/Clock Noise
Firstly, it would be better to review other components with AD9523 in order to understand how SNR is affected in the test setup. Secondly, engineer might investigate Phase and Clock noise in different layer design of PCB board. For example, figure 2 shows that the number of input source is feeding into one of PCB, influencing the noise naturally.

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More Blogs from Jonathan Harris
We begin this series of blogs by taking a look at ADIsimADC, which is a quite relevant design tool for Jonathan Harris, an applications engineer in ADI's high-speed ADC group.
In this blog we’ll take this one step further and look at driving the ADC power supplies directly from a DC/DC converter.
Previously in this blog series we looked at using a DC/DC converter (switching regulator) in combination with an LDO to drive the power supply inputs to an ADC. What we found was that using the DC/DC converter to step down the input voltage for the LDO was a much more efficient way to drive the power supply inputs to an ADC.
We look at using a DC/DC converter along with an LDO to drive the ADC power supply inputs.
I thought it would be good to continue looking at the example I gave in my last blog where we looked using fewer LDOs and combining power supply rails on an ADC while maintaining isolation with ferrite beads.
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