Home    Bloggers    Blogs    Article Archives    Messages    About Us   
Tw  |  Fb  |  In  |  Rss
Jonathan Harris

ADC Noise: The Clock Input & Phase Noise, Part 3 – Test Setup

Jonathan Harris
jonharris0
jonharris0
4/29/2014 8:02:29 PM
User Rank
Blogger
Re: Two PCB –Phase/Clock Noise
Hi DaeJ, the AD9523 phase noise will defintely be affected by the jitter of its reference source.  The point here in this blog was not to evaluate the AD9523 jitter performance but rather to look at the effect of the output jitter (phase noise) on the SNR of the AD9643.  Also, you have a very good point with the PCB.  It is always important to consider good design practices when designing PCBs such that additional noise from other sources on the PCB do not impact the noise in the ADC.  I'd recommend looking back over some of my blogs related to ADC noise for some nuggets along those lines.  Thanks for the great comments!

50%
50%
DaeJ
DaeJ
4/19/2014 6:50:52 PM
User Rank
Master
Two PCB –Phase/Clock Noise
Firstly, it would be better to review other components with AD9523 in order to understand how SNR is affected in the test setup. Secondly, engineer might investigate Phase and Clock noise in different layer design of PCB board. For example, figure 2 shows that the number of input source is feeding into one of PCB, influencing the noise naturally.

50%
50%
More Blogs from Jonathan Harris
In this installment of this series I’ll explain how to collect load regulation for an LDO.
A device going into space must be much more rigorously evaluated than a device going into a commercial product. Hence the need to do a good deal more characterization and ‘proving out’ of the device to make sure that it will endure the harsh environment in space as well as the long lifetimes required.
As somewhat of a continuation of my last blog topic I am once again returning to measurement of an LDO parameter as I look at the power supply rejection ratio (PSRR) of this device
Characterize the noise spectral density (NSD) of an LDO, otherwise known as a low dropout voltage regulator.
Now that we’ve had a chance to learn a bit about the tool we will take a look at using Virtual Eval to predict the performance of the AD9680-500 which has integrated digital downconverters (DDCs) and will compare simulated data to measured data.
flash poll
educational resources
 
follow Planet Analog on Twitter
Planet Analog Twitter Feed
like us on facebook
our partners
Planet Analog
About Us     Contact Us     Help     Register     Twitter     Facebook     RSS