Thermal issues abound as electronic integration increases density of integrated circuits. In fact, this was the topic of a recent Planet Analog-Integration Nation live chat: How can we best get the heat out? In that discussion, a main issue discussed was increased thermal loading in denser integration leading to damaging, component-life-shortening temperature levels.
Work on measuring temperature in ICs goes back a long way. For example, in 1977 Allegro Microsystems published an application note entitled "Computing IC Temperature Rise." The note gives basic equations to calculate junction temperature rise as a function of power, with some duty cycle considerations. In cases where that approach is inadequate, Allegro suggested using the forward voltage vs. temperature relationship of a diode within the IC as a direct measurement. Of course, that approach requires advance planning in the design and adds cost to the IC for the sense diodes.
Almost 35 years later a TI-authored paper in the Electronic Engineering Journal, "Methods of Estimating Component Temperatures,"
promoted exactly that technique as the method of choice. The authors also talked about other ways to estimate IC temperature, ranging from measuring the board temperature near an IC to measuring temperature on the surface of the package. These methods have tradeoffs and are less accurate than in situ measurement.
There is also a long history of bench-level and laboratory measurements of IC temperature. A 2006 paper from the Institut National des Sciences Appliquees (INSA) de Lyon in France introduced scanning thermal microscopy as an analytical tool to study temperature rise and distribution in IC packages. Although capable of very accurate measurements, it obviously isn't something every development group will have available.
Upping the ante, in 2009 a team from the UC Santa Cruz EE department described the use of confocal Raman spectroscopy as a way to acquire 3D temperature profiles of a functioning IC package. By appropriate choice of light source for the Raman Spectroscopy, they claimed to measure 3D positions of heat sources, using a specially fabricated device as the test reference. My take is that this method might be of limited value in real ICs where there are a lot of heat sources.
With all this focus on heat in ICs, it is almost ironic that in the area of silicon photonics, researchers are developing methods of heating the chips. In a new paper from the silicon photonics leaders at IMEC and Ghent University, architectures for heating elements built into an IC are compared. What the researchers showed is that using existing CMOS processes and element compositions, a large range of performance curves can be obtained, which gives chip designers a lot of design freedom.
The reason that heating elements may be needed in silicon photonic ICs is that silicon waveguides have a significant shift in optical behavior with temperature. In WDM (wavelength-division multiplexing) systems, which are key to optical networking performance, wavelength control is paramount. The authors of the IMEC/Ghent study state that silicon waveguides can cause shifts of 80ppm/°K. Considering an IC might need to work over a span of 125° or more, this can cause shifts of 10 nanometers. Since WDM systems use channel spacing of less than 1 nm, it is evident that temperature compensation is needed.
In order to do very precise temperature compensation, you need good temperature measurements. This brings us full circle.
Interferometry has been used in many ways to perform temperature measurements, because it allows detection of very small, mechanical shifts associated with the thermal expansion of materials. In fact, in the IMEC/Ghent study described earlier, they used a Mach Zender interferometer to measure temperatures in the heating element evaluation. In a new paper from the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, and A*STAR (Agency for Science, Technology and Research), Singapore, the authors describe measuring temperature with a Michelson Interferometer constructed in CMOS1 that is only 40μm x 70μm and uses silicon waveguides. You might recall the Michelson interferometer from the famous Michelson-Morely experiment, which showed there was no "aether wind" and eventually led to Einstein's Special Relativity. This new instance is much, much smaller!
Called a photonic thermocouple by the authors, the work is directed at low-cost, high-sensitivity, and high-temperature-range applications, especially in harsh environments. What caught my attention is that this device is ideally suited for integration into silicon photonic devices. Figure 1 is taken from the paper.
SEM image of the silicon waveguide geometry used to form a Michelson Interferometer. The loops act as "mirrors" causing full reflection, and the section in detail "DC" is a splitter.
(Source: Reference 1)
The authors show that their device can produce a linear response over at least 100K° of temperature change, and with multiple times the sensitivity of other methods such as the temperature-dependent response of a silicon waveguide ring resonator. Although this work wasn't directed at silicon photonics integration, I think it may have a useful place in the complete solution of silicon photonic ICs. What do you think?
- Photonic Thermocouple Design Based on an Ultra-Compact Michelson Interferometer, by J. F. Tao, H. Cai, Q. X. Zhang, J. M. Tsai, P. Kropelnicki, A. B. Randles, M. Tang, and A. Q. Liu. The paper was published by the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, and A*STAR (Agency for Science, Technology and Research), Singapore.