Design Con 2015
Home    Bloggers    Blogs    Article Archives    Messages    About Us   
Tw  |  Fb  |  In  |  Rss
Alan Walsh

Challenges & Requirements: Voltage Reference Design for Precision Successive-Approximation ADCs, Part 1

Alan Walsh
etnapowers
etnapowers
6/12/2014 3:36:06 AM
User Rank
Newbie
Re: area occupation
Thank you very much Alan, for sure it helps. I found very interesting the DAC implementation by mean of a R-2R network:

"One of the most common DAC building-block structures is the R-2R resistor ladder network shown in Figure 3.15. It uses resistors of only two different values, and their ratio is 2:1. An N-bit DAC requires 2N resistors, and they are quite easily trimmed. There are also relatively few resistors to trim."

That's exactly what I was referring to.

 

50%
50%
etnapowers
etnapowers
6/12/2014 3:29:03 AM
User Rank
Newbie
Re: area occupation
Thank you Alan, I realize that the particular solutions are often classified as confidential or restricted, the basic idea is often non protected, I will search information, thank you for the interesting blog.

50%
50%
AlanWalsh
AlanWalsh
6/11/2014 5:09:08 PM
User Rank
Newbie
Re: area occupation
Did a little bit more digging. There is an article on the analog website here that goes into some detail. Hope this helps.

http://www.analog.com/library/analogdialogue/archives/39-06/Chapter%203%20Data%20Converter%20Architectures%20F.pdf

Rgds,

Alan

50%
50%
AlanWalsh
AlanWalsh
6/11/2014 5:00:07 PM
User Rank
Newbie
Re: area occupation
Hi Etnapowers,

These implementations are often proprietary or patent protected so i don't have one i can share. I'm sure with some research on the web you can find something general.

Best Rgds,

Alan

50%
50%
etnapowers
etnapowers
6/11/2014 4:48:05 AM
User Rank
Newbie
Re: area occupation
@Alan, could you provide any link that illustrates the real implementation on silicon of the ADC?

50%
50%
etnapowers
etnapowers
6/11/2014 4:47:19 AM
User Rank
Newbie
Re: area occupation
Thank you Alan, I guess that a real implementation might be done by an R-2R technique, in order to minimize the occupation area on silicon.

50%
50%
AlanWalsh
AlanWalsh
5/21/2014 12:21:26 PM
User Rank
Newbie
Re: area occupation
Hi,

Figure 1 is mainly an illustration to aid in explaining the operation of a SAR and how the individual bit capacitors get switched to ground or the reference. As you allude to the actual implementation on silicon can be quite different.

Best Rgds,

Alan

50%
50%
etnapowers
etnapowers
5/21/2014 6:16:45 AM
User Rank
Newbie
area occupation
I wonder if the configuration of figure 1 is the best solution in terms of area occupation, due to the presence of capacitors 32 times the C value.

50%
50%
More Blogs from Alan Walsh
A poorly designed reference circuit can cause serious conversion errors. The most common manifestation of a reference issue is repeated or “stuck” codes from the ADC
Once the drive capability has been determined, we must ensure that the noise from the reference circuit does not affect the ADC’s performance.
The voltage reference may integrate a buffer that has sufficient drive current. Otherwise, a suitable op amp can be used as a buffer.
How much power does your ADC draw? The spec sheet may provide the answers -- but read the fine print.
flash poll
educational resources
 
follow Planet Analog on Twitter
Planet Analog Twitter Feed
like us on facebook
our partners
Planet Analog
About Us     Contact Us     Help     Register     Twitter     Facebook     RSS