In Part 1 of this blog, we started looking at reducing noise, increasing dynamic range, and increasing the ENOB (effective number of bits) with a SAR (successive approximation register) ADC. The method is based on oversampling -- commonly used on low-speed, high resolution delta-sigma ADCs -- less commonly used elsewhere. We continue by looking at some test results with a SAR ADC using an Eval board and its software.

Measurement results
The oversampling capability is implemented in the AD7960/61 evaluation software using a simple averaging of the ADC output samples, meaning, and summing the number of ADC samples and dividing it by the oversampling ratio to get the increased dynamic range. This software allows the user to select the "Oversampling Ratio" up to 256 from the drop-down menu (red box) under the Configure tab as shown in Figure 1. The maximum dynamic range achieved is limited by the low frequency 1/f noise of the system, which starts to dominate at lower output data rates below 20kSPS.

Figure 1

AD7960/61 evaluation software panel

A spectrum of the signal and the flat noise from DC to fs/2 in Figures 2 and 3 shows that the noise can be filtered to fs/(2•OSR) to improve the dynamic range and SNR. In this case, the oversampled dynamic range is the ratio of the peak signal power to the noise power measured in the ADC output FFT from dc up to fs/(2•OSR), where fs is the ADC sample rate.

Figure 2a

AD7960 Oversampled FFT Output with no input signal (OSR = 256, REF = 5V)

I've found cases where input signal has a very high bandwith compared to the application bandwith of interest and the signal conditioning amplifiers and filters are not sharp enough to limit those high frequency signals. Keeping the aliasing noise under some reasonable level was a must and adding more high order analog filters was not suitable.

In one of those cases it was enough oversampling the input signal, real-time filtering (FIR, in that case) and downsampling the filtered data before passing it to all of the rest of the real-time processing algoritms.

Also to add that without oversampling, it is very difficult to implement filters with the sharp cutoff which are required to maximize use of the available bandwidth without exceeding the Nyquist limit, any experiance or feedback on Noise factor..

We have used an in-built ADC of a MCU for oversampling. The available resolution was 10 bits and we could get upto 12 bit. It was a pressure sensor signal.

Getting more data provides more accurate resolution for system. But I think that in some application such as temperature measurement which is slowly changing to voltage, undersampling would be an appropriate choice. I wonder that oversampling and undersampling would be used simultaneously depending on multiple signal bandwidths and multiple frequencies.

I need 100-dB dynamic range for a medical imaging application. Can you help me choose between successive-approximation and sigma-delta ADC architectures?

For data acquisition systems, sometimes a successive approximation ADC works best. Other times, a delta-sigma is the best choice. Let's see what works best and why.

For data acquisition systems, sometimes a successive approximation ADC works best. Other times, a delta-sigma is the best choice. Consideration must also be given to the multiplexer. Let's see what works best and why.

For data acquisition systems, sometimes a successive approximation ADC works best. Other times, a delta-sigma is the best choice. Also, you need to consider the multiplexer. Let's see what works best and why.

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