In Part 1 of this blog, we started looking at reducing noise, increasing dynamic range, and increasing the ENOB (effective number of bits) with a SAR (successive approximation register) ADC. The method is based on oversampling -- commonly used on low-speed, high resolution delta-sigma ADCs -- less commonly used elsewhere. We continue by looking at some test results with a SAR ADC using an Eval board and its software.
The oversampling capability is implemented in the AD7960/61 evaluation software using a simple averaging of the ADC output samples, meaning, and summing the number of ADC samples and dividing it by the oversampling ratio to get the increased dynamic range. This software allows the user to select the "Oversampling Ratio" up to 256 from the drop-down menu (red box) under the Configure tab as shown in Figure 1. The maximum dynamic range achieved is limited by the low frequency 1/f noise of the system, which starts to dominate at lower output data rates below 20kSPS.
AD7960/61 evaluation software panel
A spectrum of the signal and the flat noise from DC to fs/2 in Figures 2 and 3 shows that the noise can be filtered to fs/(2•OSR) to improve the dynamic range and SNR. In this case, the oversampled dynamic range is the ratio of the peak signal power to the noise power measured in the ADC output FFT from dc up to fs/(2•OSR), where fs is the ADC sample rate.
AD7960 Oversampled FFT Output with no input signal (OSR = 256, REF = 5V)
AD7960 Oversampled FFT Output with fin=1kHz (OSR = 256, REF = 5V)
AD7961 Oversampled FFT Output no input signal (OSR = 256, REF = 5V)
AD7961 Oversampled FFT Output with fin=1 kHz. (OSR = 256, REF = 5V)