(Editor's note: we are pleased to begin a new series on the vital and sometimes unappreciated topic of electromagnetic compatibility (EMC), presented by well-known expert Daryl Gerke of Kimmel Gerke Associates. Here is his introduction to you, followed immediately below it by first entry in the series, which looks at printed circuit board EMC, starting with the clock circuit.)
Hi! I'm Daryl Gerke, and I am delighted to again be working with the good folks at EDN, now part of UBM Electronics. Way back in 1994, my business partner (Bill Kimmel) and I wrote the original EDN Designer's Guide to EMC. At that time, we wanted to share our collective half century of industry experience with our design colleagues.
As full-time EMI/EMC consultants since 1987, we had seen a multitude of EMI problems. Although spread across different industries, the underlying causes were often similar. So when former EDN Editor Steve Leibson (still blogging for EDN) put out a call for design tutorials, we responded with what eventually became the Designer's Guide.
Fast-forward 17 years and the EMI problems are still with us. At this stage in our careers, we've become "old warriors" with over 80 years of collective experience. Our goal now will be to help you sharpen your "EMI spears". I hope you enjoy our efforts.
We will focus on design and troubleshooting, not test and regulations. As we are fond of saying, "An ounce of EMI prevention is often worth a pound of EMI shielding." This is best accomplished at the design stage, when most EMI fixes are cheap or even free. Thus, we felt EDN was the perfect place to share our insights.
For personal information, please visit http://www.emiguru.com. You'll find lots of additional resources there, too. Most are free, and a few are available for a nominal charge. This blog also originates there. Finally, if you are curious about consulting, check out my other blog at http://www.jumptoconsulting.com. (Be sure to visit the special welcome for geeks.)
And now, let's get started on our first entry in the EMC series:
Welcome to the first post on EMC issues here at Planet Analog and EE Times. Since this is a design-oriented site, we'll begin with some EMC design issues. Specifically, we'll address what should you look for when doing an EMC design review on your printed circuit boards (PCBs).
Not doing these kinds of reviews? Well, you should. An hour or two at the beginning the project can save thousands of dollars and a lot of grief at the end of the project. One extra trip to the EMC lab can easily cost $10K or more when you include your engineering time. And who know how much it costs by being late to market?
Convinced yet? I hope so. A quick EMC design review is pretty simple. We do these reviews for clients all the time, and you can do them for yourself. For the next half dozen posts, we'll give you a quick overview.
To start, we look at the following five critical circuits: clocks, resets, power regulators, analog, and I/O. These five circuits probably account for 90% of the EMI problems at the PCB level. Today, we'll look at clocks.
As the most periodic of signals, clocks are the richest in harmonics that often result in radiated emissions problems. As a minimum, we worry about the first 20 harmonics. Thus, for a 50 MHz clock, we are concerned all the way up to 1 GHz. But that is just a starting point, as we've seen higher harmonics cause problems, particularly if they excite a resonance.
We also check for clock-like or clock-derived circuits, such as memory enables or busses. These may operated at a sub-harmonic of system clocks, but can still cause emissions problems. Of course, many systems have multiple clocks, so all the clocks be addressed.
Prior to testing, we recommend making a chart showing clock harmonics all the way up to the maximum frequency of concern for radiated emissions. Then repeat the chart for all clocks divided by two, and again for all clocks divided by four. (Other division ratios may be needed if the system uses other clock derivations.) All this can be done easily on a spread sheet.
This data is very helpful during testing. If a radiated emission failure occurs, you can quickly check your spread sheet to determine which clock is a culprit. If a subdivision, this may also point to additional clock-like circuits.
Incidentally, if your failure frequency is NOT on your charts, the test data may be pointing you to a parasitic oscillation. We'll talk about these in a future posting.
Finally, typical solutions for clock problems include power decoupling, series termination (or even filtering) on outputs, and attention to clock trace routing. Also, keep clock circuits away from I/O ports to prevent unwanted radiated coupling to the I/O. In extreme cases, selective shielding may also be needed on the PCB.
We'll revisit these issues in more detail in future entries. Next up: resets.
About the author
Daryl Gerke, an EMI/EMC consultant since 1987, along with business partner Bill Kimmel, focuses on design and troubleshooting (not test and regulations). He and Kimmel have been chasing EMI problems for over 80 years (combined, of course.) He is a published author and columnist, and their EDN Designer's Guide to EMC (1994) is still in relevant and in demand. He can be reached via http://www.emiguru.com or his other blog at http://www.jumptoconsulting.com