As audio integrated-circuit (IC) designs move to finer geometries, it becomes more difficult to design, and less cost-effective to integrate, high-performance analog circuits on the same piece of silicon with high-density digital circuits. Audio system architects are pushing analog portions of an audio signal chain further towards the input and output transducers and connecting everything in between digitally.
As the analog circuits are pushed to the edges of the signal chain, digital interfaces between ICs in the chain become more prevalent. DSPs have always had digital connections, but now digital interfaces are being included on the transducers and amplifiers that usually have had only analog interfaces. A traditional audio signal chain may have analog signal connections between microphones, preamps, ADCs, DACs, output amplifiers, and speakers, as shown in Figure 1.
Figure 1: Traditional audio signal chain
IC designers are integrating the ADCs, DACs, and modulators in the transducers on opposite ends of the signal chain, which eliminates the need to route any analog audio signals on the PCB, as well as reduces the number of devices in the signal chain. Figure 2 shows an example of a completely-digital audio-signal chain.
Figure 2: Fully-digital audio signal chain
There are many different standards for transmitting digital-audio data from one place to another. Some formats, such as I2S, TDM, and PDM are typically used for inter-IC communication on the same PC board. Others, such as S/PDIF and Ethernet AVB are primarily used for data connections from one PCB to another through cabling.
This article will focus on the differences, advantages, and disadvantages of the inter-IC, rather than inter-board, digital audio formats. Choosing audio components with mismatched digital interfaces needlessly complicates the system design; understanding the pros and cons of different interfaces before selecting parts helps to streamline your component selection and ensure that you have the most-efficient implementation of the signal chain.
Inter-IC Sound (more commonly called “I-squared-S” or “I-two-S”) is the most common digital audio format used for audio data transfer between ICs. The I2S standard was introduced by Philips Semiconductors (now NXP) in 1986 and was revised in 1996. The interface was first popularly used in CD-player designs, and now can be found in almost any application where digital-audio data is being transferred from one IC to another. Most audio ADCs, DACs, DSPs, sample-rate converters, and some microcontrollers include I2S interfaces.
An I2S bus uses three signal lines for data transfer – a frame clock, a bit clock, and a data line. The two clocks can be generated by the receiving IC, the transmitting IC, or even a separate clock-master IC, depending on the system architecture, Figure 3. An IC with an I2S port can often be set to be in either master or slave mode. Unless a sample-rate converter is being used in the signal chain, a system will usually have a single I2S master device so that there are no issues with data synchronization.
Figure 3: I2S connection diagram, receiver as master
The Philips standard for these signals uses the names WS for word select, SCK for the clock, and SD for the data, although IC manufacturers seem to rarely use these names in their IC datasheets. Word select is also commonly called LRCLK, for “left/right clock”, and SCK may be called BCLK, for “bit clock” or SCLK for “serial clock”.
The name of an IC’s serial data pin varies most from one IC vendor to another, and even within a single vendor’s different products. A quick survey of audio IC datasheet shows that the SD signal may also be called SDATA, SDIN, SDOUT, DACDAT, ADCDAT, or other variations on these, depending on whether the data pin is an input or output.
An I2S data stream can carry one or two channels of data with a typical bit clock rate between 512 kHz, for an 8-kHz sampling rate, and 12.288 MHz, for a 192-kHz sampling rate. The data word length is often 16, 24, or 32 bits. For word lengths less than 32 bits, the frame length is often still 64 bits and the unused bits are just driven low by the transmitting IC.
Although it is rare, some ICs only support I2S interfaces with a maximum of 32 or 48 bit clocks per stereo audio frame. A system designer has to be careful when using one of these ICs to make sure that the devices on the other end of its connections can also support these bit clock rates.
While I2S format is the most commonly used, there are other variants of this same three-wire configuration, such as left-justified, right-justified, and PCM modes. These differ from I2S by the position of the data word in the frame, the polarity of the clocks, or the number of bit clock cycles in each frame.
TDM formats Some ICs support multiple I2S data inputs or outputs using a common clock, but this obviously increases the number of pins necessary to transfer the data. Time division multiplexed (TDM) formats are used when more than two channels of data are to be transferred on a single data line. A TDM data stream can carry as many as sixteen channels of data and has a data/clock configuration similar to that of I2S.
Each channel of data uses a slot on the data bus that is 1/Nth the width of the frame, where N is the number of channels being transferred. For practical purposes, N is usually rounded up to the nearest power-of-two (2, 4, 8, or 16) and any additional channels are left empty. A TDM frame clock is often implemented as a single bit-wide pulse, rather than I2S’s 50% duty-cycle clock. Clock rates above 25 MHz are not commonly used for TDM data, since higher frequencies cause board layout issues that PCB designers would rather avoid.
TDM is commonly used for a system with multiple sources feeding one input, or one source driving multiple devices. In the former case, each TDM source shares a common data bus. The source must be configured to drive the bus only during its appropriate channel, and tri-state its driver while the other devices are driving the other channels.
There is no standard for TDM interfaces, such as the Philips standard for I2S. This means that many ICs have their own slightly-different flavor of a TDM implementation. These differences may include clock polarities, channel configuration, and tri-stating or driving unused channels. Of course, these different ICs will usually work together, but a system designer needs to take care to ensure that outputs of one device will spit out data in the format that the inputs of another are expecting!