As clock speeds and communication channels run at ever higher frequencies, engineers who have previously had little need to consider clock jitter and phase noise are finding that they need to increase their knowledge of these subjects. This primer provides an overview of jitter, offers practical assistance in making jitter measurements and examines the role phase locked loops (PLLs) have in this field.
This in-depth, very readable tutorial explores the many types, impact, and measurement of jitter. It is presented as on on-going series in eight sections.
1: Classes of Jitter (click here)
2: Types of Jitter Measurements
4: Time versus Frequency Domain Measurements
7: PLL Characteristics
8: Clock Buffers
About the author
Howell Mitchell is a Staff Applications Engineer at Silicon Labs where he is responsible for product support for a family of jitter-attenuating PLL-based timing devices. Mr. Mitchell has worked with PLL-based ICs and timing circuits for more than 25 years. In previous roles, he has been involved in high-speed networking, quantum key distribution and parallel processing development projects. Mr. Mitchell holds five patents in the areas of phase modulation and quantum key distribution. He holds a BA in Physics from Bucknell University and an MA in Engineering from Northeastern University.