NEW YORK—Integrated Device Technology Inc.’s deal to develop wireless charging ICs for Intel’s reference designs represents a coup for the mixed-signal company.
But whether the Intel and IDT (San Jose, Calif.) partnership can play a major role in proliferating wireless power technology is unclear. Their shared success depends on how quickly and widespread Intel’s wireless charging technology is adopted in Ultrabooks, all-in-one PCs, smartphones and standalone chargers.
And it isn’t the only wireless power standard out there. There are several others currently being developed that would enable the wireless transfer of power to charge electronic devices, including the Wireless Power Consortium’s “Qi” and the Alliance for Wireless Power (A4WP) led by Samsung and Qualcomm. And in one of its past relationships, things didn’t go the way IDT had planned.
“It’s still a show-me story,” said Robert Burleson, an analyst with investment bank Canaccord Genuity based in San Francisco. IDT had put its support behind DisplayPort in 2007 after Intel released its roadmap for the digital interface standard. OEMs didn’t roll-out DisplayPort-based products as quickly as IDT had anticipated, and its products were commoditized by the time OEMs started to go to market with them.
“The main test for IDT has to do with their allocation of R&D dollars,” Burleson said. “Analog is a fragmented marketplace, and there’s a lot of discretion in terms of how you spend your R&D and which products you go after. In the past there have been some failures, like DisplayPort, and so it’s a test of management in terms of successfully spending on R&D for products that yield revenue and good returns.”
IDT, however, works with all of the standards bodies, according to Arman Naghavi, IDT’s vice president and general manager of the Analog and Power Division. Its strategy is to build SoCs that can easily be tweaked to meet the needs of its OEM customers, regardless of the wireless charging standard their products will support.
“It appears IDT has been most aggressive in responding to the wireless charging opportunity,” said Steve Ohr, analog and power semiconductors analyst at Gartner Inc.
The level of noise produced by the aliasing effect during the sampling process can be reduced in two steps of the signal chain. The inclusion of the anti-aliasing filter, combined with over-sampling and decimation, are effective mitigation techniques.
Over the years, the introduction of more complex tools has enabled much more capability in the circuit simulation arena. These new tools enable exploring circuit interaction to arrive at solutions to complex issues.