Well folks, looks like the comments are winding down. We'll leave the chat window open a bit longer. I'd like to thanks all of our guests for their comments and for the other folks who were observers. We will do another chat next month - topic TBD.
For larger TECs, I suspect it may be a long while before it pays for itself. Also, we haven't yet discussed the coefficients of thermal expansion amongst all the parts within the TEC itself. If there's too much of a mismatch, the TEC can tear itself apart.
Keep in mind a TEC is a bunch of P-N junctions. Normally, all tied together in a module. But you could independently energize groups of them via a circuit etched in the metallization of the diamond layer. You would attach the P-N dice to the diamond wafer and attach to the IC to cool hot spots and spread through the diamond. On the other side you would probably metallize and either put a larger TEC to pump more heat out, or a heat sink. Pretty complex and spendy, but it could be done.
@TETECH Yes, a tiny peltier must still somehow spread out its waste heat. Comes down to needing a mound of thick diamond spreading heat from THIN silicon to big wide base, then conventional heatsink. Get me a mound 3x wider at its base compared to the die, and this will work well passively. Anybody know how to fabricate such a diamond platform cheaply?
@Scott >>That ugly brown color aging see on white skin products. That explains why some companies pick ugly brown shades for the case material. Not in a DMM (viz Fluke) of course, but in some other very high speed equipment.
Nextreme says that for the most efficient in-package or thru-package hot spot cooling, their eTECs act as a microscale heat pump, providing pinpoint thermal control for high heat fluxes. Nextreme devices are very thin, able to embed directly inside a semiconductor package and even fit inside a TO-56 package.
Here is my two cents on value for backside heat removal. There are numerous small form factor products (read: hand held) where top side package temperature is critical. I've seen specifications down to 60C maximum for a power product. This keeps discoloration of the product skin down to a minimum. That ugly brown color aging see on white skin products.
@Scot >> I also have to worry about bond wire inductive ringing that will wear out my transistor for low voltage switching power supplies. That's one that a lot of design engineers pro'ly don't even think of. Good point.
Diamond seems to have best possibilities as a bonded wafer element, where all devices on a wafer are isolated and heatsunk on a "handle" wafer. Here the thinness of the diamond is more to scale with the small devices and lateral heat spreading can work. Teeny RF power transistors with huge power densities can benefit. However, large transistors would not enjoy the geometric advantage and I think diamond is really debateable for circuit-sized transistors.
@Brad, agreed its chemical inertness while attractive for some applications can be an issue when you are trying to stick/bond things to it. In practise its only a subset of metals that can form a carbide on the diamond surface at relatively low temperatures. This is also the reason why you get strong adhresion when growing on Si - effectively a few monolayers of SiC form to chemically attach
@eGaN FET - I think the list of tradeoffs for top side vs. bottom side signal paths is pretty long. If I have to add bond wires in my high current path, then I add more power drop. So my FET has to become larger to counter the bond wire loss. I also have to worry about bond wire inductive ringing that will wear out my transistor for low voltage switching power supplies. The list is long...
In power applications it's best if the top surface is "quiet" (close to ground potential) for noise reasons. It also helps with heat sinking because you don't need electrical isolation between the devices and the heatsink.
@Scott-- I agree that the copper bonding issue, but many IC companies put efforts on it. We have seen many products using copper bonding. Obviously, flip chip is the trend, but it waste the top surface to transfer signals. The 3-D structure might be the future trend from this point of view.
Titanium is a good metal for diamond, as on a relatively low temperature anneal, you form a Titanium carbide interface with the diamond. This chemical bond is crucial for minimizing thermal barrier resistance and giving longevity to the contact. Once this is formed most standard metal schemes can be applied
@Jian Yin - Copper bonding forces lots of compromises because it is harder material. Not everyone has figured out how to solve these problems yet. I think everyone would go to flip chip if the assembly issues (flow solder under pkg) were solved.
Hi Brad. I've designed several chipscale packages and I hated them. These were precision amplifiers. You have to keep the sensitive circuitry away from the solder balls, so there's not much good layout area left. For analog circuits, you exchange package cost for silicon cost. For power circuits, the issue is getting heat through restricted silicon paths, increasing effective thetaJ compared to backside heatsinks. All that said, the trend is away from wires.
@RedDerek - Well the price of gold was a non issue in packaging for a long time. That's obviously no longer true. So I see everyone racing to flip chip. Die - ball - board copper. Get rid of all bond wires. So as soon as you can take heat out the top side, it seems like backside spreading becomes less important.
traditional semiconductor packages add heat spreading, but at the same time add thermal resistance. The best package is no package. EPC's die are only limited by how fast we can get the heat out the back or front. By thinning the die we can get the best power density as long as we have a good thermal connection to a heatsink on the back.
goafrit2--the heat spreader takes heat from a small area to a larger area. The heat sink then takes that heat out to the fins. In some cases, if you just have the heat sink, then the heat is concentrated in the center and cannot make effective use of the fins at the edge of the heat sink.
@Scott Elder - Chip industry is not going completely bondwire-less. They are using clips for source connection and the drain is the lead frame. Still a bondwire for the gate. Unless you are talking about going to bumped die like EPC is offering with little in the way of packaged parts.
Yes, but...simple geometry. Thermal resistance of a rectangular flow is R*d/A where R is the material's thermal resistivity, d is the distance to flow, A the cross section of the flow. As a die attach, d is small and A relatively large. For lateral flow, d is now large but A small. How can this help much, even with optimal R?
eafpres - the cvd method for growing diamond places certain constraints on the materials you can grow it on to. Substrates such as Si and SiC can be used but more commonly the diamond is attached via soldering or metallization post growth
With the work that Element Six has done over the past many years, the cost of synthetic diamond has come down considerably; and that's why we make different grades of thermal conductivity - we can grow the lower grades faster
How relevent is this technology to the future given that the integrated world is moving to chip scale packaging without bond wires? So there really isn't a die attach. And there aren't bond wires either.
Barry - I think in part the answer to your question is too fold. First the diamond is iotropic so heat flow through is same as heat flow in plane. also a rough rule of thumb to get maximum reduction in junction temperature you want your heat spreader e.g. diamond the thickness of the heat spot, e.g. gate width
The challenge is cost. If diamond is primarily a heat spreader, it may be less expensive to thin down the die and attach it to the metal heat sink directly. The result isn't quite as good but you can make a larger die to compensate. It's all about cost.
Is it feasible to grow a "relatively thick" layer of diamond on the bottom of a heatsink and therefore have an integrated heat spreader/heat sink, which would be used in the traditional way but have higher overall thermal performance?
Alex - the question about integration with the mosfet, is one ive been keen on. The challenge has been to address the price point for the area of device they often ask about. To date diamond has most often been used in small area devices with very high power densities. It might well be than GaN based devices are beginning to push this need ?
I don't understand diamond. As a die attech, it's very thin and wide in the direction of heat flow. This is an inherently low thermal resistance path, not a big problem. Yet for heat to flow sideways, we have a very thin cross section in the heat flow thus very much higher thermal resistance path. It's hard for me to understand how even a diamond spreader could be effective.
I've always wanted to ultimately see synthetic diamond extended to the power element like the MOSFET----Alex Lidow at EPC has a packageless technology for his eGaN MOSFET and with synthetic diamond added to the mix---that could make for a very thermally efficient device---can this be done?
Getting the heat out of the TEC is just as much of a problem. The heat sink must not only handle the heat the TEC is removing, but it must also handle the heat associated with the power input to the TEC. A bottle neck to the heat transfer can be the ceramics themselves, so perhaps there could be a way to implement synthetci diamond in place of the more typical alumina ceramic.
Just to get started, Element Six has made CVD synthetic diamond for more than 20 years - we've worked with LED's, laser diodes, and RF devices to provide heat spreaders for thermal management of these devices
The company also made thermally enhanced PCB prepreg and laminates, some of which were used in LED assemblies. Getting head out from LEDs is a problem similar to getting heat out of dense ICs/processors. Limited area, problems of gaps, materials need to be electrical insulators but thermal conductors, etc.
In a past life I worked for Laird Technologies. The Thermal Solutions Business Unit made and sold thermoelectric elements, modules, and complete cooling assemblies. I have an engineering background but was involved in strategy and product marketing. I visited lines making the dice for TECs and the assembly lines for the TE modules.
We're having a chat on Tuesday June 25th at 2 PM EDT on integrated analog. Please come join us for the discussion. The topic is Analog integration is increasing: How can we best get the heat out? We will have industry experts discussing the problem that results from packing lots of circuitry onto a small die and methods to keep it cool.