Using a multiple-output power IC to power a multiple-rail application, such as an FPGA and/or DSP, is highly desirable because of its simplicity. Due to its flexibility, a controller-based multi-rail power IC is ideally suited for this application. Unlike power solutions with fixed, integrated FETs, one has to also consider an integrated device, such as TI’s TPS75003, that incorporates two controllers and a linear regulator. This design allows the user to optimize the solution size to accommodate the wide-range of possible voltages and currents associated with DSP and FPGA power solutions. This optimization also results in an extremely cost-effective solution since the power stage can be designed for the specific system power requirements.
As shown in Figure 1, the multi-output power IC consists of two step-down controllers, each capable of providing up to 3A of output current for powering the five percent tolerant core and I/O rails, and a 300 mA linear regulator for powering a low-power, noise-sensitive rail.
Figure 1 – Typical Application Schematic
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Unlike controllers with conventional feedback, the device is a modified hysteretic step-down controller that directly monitors the output voltage to control the power FETs, which improves response times by eliminating slower feedback and compensation paths. It is very simple to compensate, requiring only a low-ESR tantalum output capacitor for optimal performance to provide excellent transient response, as shown in Figure 2. The worst-case load transient sets the value of the output capacitor. The controller is designed to provide optimal performance with popular output capacitors with ESRs between 30 mΩ and 150 mΩ.
Figure 2 – Load transient response for VOUT = 3.3V and IOUT = 200 mA to 1.8A to 200mA
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Unlike typical hysteretic controllers with unpredictable and widely-varying switching frequency swings, the device’s switching frequency is virtually-fixed and has small changes over typical mid- to high-current operating ranges as shown in Figure 3. This improved switching frequency is achieved by using time hysteresis, in the form of a minimum on-time and minimum off-time for the FET.
Figure 3 – fSW vs Output Current and Input Voltage
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When the VOUT to VIN differential is large, the device works in minimum on-time mode and the frequency can be predicted as fSW= VOUT/(VIN*tON). Assuming ideal components, the recommended minimum inductor size is simply LMIN = (VIN-VOUT)/ΔIL, where ΔIL, the inductor ripple current, which is generally set to 30 percent of IOUTmax or less. When the VOUT to VIN differential is small, the device works in minimum off-time mode and the frequency can be predicted as fSW = (1-VOUT/VIN)/tOFF. Again, assuming ideal components, the recommended minimum inductor size is simply LMIN = (VOUT+VSCHOTTKY)/ΔIL. The inductor can be oversized to reduce ΔIL, and therefore VOUTpkpk = ESR*ΔIL, which might be necessary in order to accommodate an output capacitor with higher ESR. Inductor packages are chosen to accommodate the maximum output current plus the ripple current, including some headroom for transients. The datasheet and a downloadable software tool provide inductor sizing equations that account for non-ideal components.
Table 1 shows some example bills-of-material for either of the controllers configured to provide various output voltages and currents from various input voltages.
Table 1- Example Bills-of-Materials
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Like any buck converter, the FET and diode are sized to accommodate the expected peak currents and power dissipation. FETs with higher RDSON and inductors with higher DC resistance are generally less expensive. But, they have lower current ratings due to I2R power losses and therefore result in a lower efficiency solution, as Table 1 shows. Each buck controller operates with a small 10 μF ceramic input capacitor.
A good power supply provides a method to minimize both the time-and-voltage differential between the rails during start-up. From a system perspective, soft-starting the rails as well as sequentially sequencing them prevents the input power bus from being pulled down by the converter. This helps it avoid hitting the current limit due to start-up currents necessary to charge each power rail’s bulk and decoupling capacitors. Both of the controllers and linear regulator provide monotonic soft-start which is controlled by external soft-start capacitors. In addition, independent ENABLE pins for each output allow the outputs to be sequenced by tying the output of one rail to the enabler of the other. Figure 4 shows the start-up waveform of the circuit in Figure 1 with VIN = 5V, VOUT1=1.2V tied to EN3 that enables VOUT3=2.5V, which is tied to EN2 that enables VOUT2=3.3V.
Figure 4 – Start-up waveform with IOUT1= IOUT2=1A, IOUT3 = 100mA, CSS1=CSS2=1500pF and CSS3=0.01 μF
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To power a wide range of applications, a multi-rail power IC consisting of flexible controllers can be more cost-effective than an IC with integrated FET converters. The controllers can be sized to accommodate the application’s exact needs. A simplified control topology, which features soft-start and independent enables, make the integrated device easy to design a robust power supply for multi-rail applications.
