Analog Angle Article

12-bit ADC clocks 3.6 Gsps with nearly invisible noise floor, strong noise power ratio and IMD

Santa Clara, Calif. – Monolithic analog/digital converters (ADC) are enabling the long-sought software-defined radio (SDR) architecture, where parameters such as noise floor, noise power ratio (NPR), and intermodulation distortion (IMD) are better performance measures than signal-to-noise ratio, and effective number of bits (SNR, SFDR, and ENOB, respectively) at indicating the ability to extract a narrowband information from a wideband spectrum.

National Semiconductor ADC12D1800 3.6 Gsps ADC family

(Click on image to enlarge)

The ADC12D1800 from National Semiconductor offers 12-bit conversions at 3.6 gigasamples/sec (Gsps) with -147 dBm/Hz NF, 52 dB NPR, -61 dBFS IMD performance; National claims that this is 3.6 times faster than the closest available IC, and with 3.6 times wider bandwidth. Announced along with the top-line device are two pin-compatible devices: the ADC12D1600 at 3.2 Gsps and the ADC12D1000 at 1 Gsps. Target SDR applications for this family include radar, multichannel set-top boxes, signal intelligence, and LIDAR (light detecting and ranging) designs.

Noise floor for ADC12D1800 ADC shows ability to extract narrowband signal from wideband spectrum

(Click on image to enlarge)

In dual-channel mode, full-power bandwidth is 2.8 GHz, while ENOB is 9.5 bits, SNR is 59.1 dB, and power consumption is 3.4 W (typical) for the fastest device in the family (specs for the slower variations differ, of course). The pin-compatible ICs are in 292-contact, thermally enhanced BGA packages, and operate from a single +1.9V supply.

The architecture of the ADC12D1x00 family is structured to allow users to set it up for two channels which can be interleaved or run as independent channels (1.8 Gsps/channel). The device includes provision for multi-IC synchronization, programmable gain, and offset adjustment per channel. It also includes an integral track/hold amplifier and a self-calibration technique which yields a flat response to 2 GHz for all dynamic parameters, and a 10-18 code error rate.–Bill Schweber

Availability and support : The three family members are sampling now; full production in Q3-2010. Reference designs and evaluation boards are available now, as well.

For more information :

  • (for the 3.6 Gsps IC)
  • (for the 3.2 Gsps IC);
  • (for the 1.0 Gsps IC)
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