14-bit ADC reduces digital feedback in data conversion systems

Milpitas, Calif.—Linear Technology Corp. has introduced a low-power 14-bit, 150Msps analog-to-digital converter (ADC) that it says dissipates 149mW, less than one-third the power of competitive products.

According to Linear, this benchmark enables portable applications limited by stringent power budgets to extend their performance capabilities, as well as providing higher operating efficiency and reduced recurring operating costs for 3G/4G LTE and WiMAX basestation equipment.

The LTC2262 integrates two features for reducing digital feedback in situations where even good layout practice may fail. Both digital feedback reduction techniques have proven to improve spurious free dynamic range (SFDR) performance by 10-15dB.

Operating from a low 1.8V analog supply, the LTC2262 offers signal to noise ratio (SNR) performance of 72.8dB and spurious free dynamic range (SFDR) of 88dB at baseband. Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with high noise performance.

The LTC2262's digital outputs can be set to full rate CMOS, double data rate CMOS, or double data rate LVDS. Double data rate digital outputs allow data to be transmitted on both the rising edge and the falling edge of the clock, reducing the number of data lines needed by half. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.

Offered in a 6mm x 6mm QFN package, the LTC2262 includes a clock duty cycle stabilizer circuit to facilitate non-50% clock duty cycles, programmable digital output timing, programmable LVDS output current and optional LVDS output termination.

The LTC2262 is offered in commercial and industrial temperature grades.

Pricing: $57 each for the 14-bit LTC2262-14, and $35 each for the 12-bit LTC2262-12 in 1,000-piece quantities.
Availability: Now.
Datasheet: click here.

Linear Technology,

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