18-bit serdes chips head for comms

Santa Clara, Calif. – National Semiconductor Corp. said its low-voltage differential signaling 18-bit serializer/deserializer (serdes) makes it simpler to design such networking and communication systems as third-generation basestations, wireless local-loop systems and broadband access equipment.

“Our customers asked us to add two extra bits to our 16-bit serdes for their critical control signals,” said Dave Lewis, marketing manager for the PC and Networking Group at National Semiconductor.

Two extra bits can be extremely useful to system designers. Though data buses are typically byte-oriented-8 or 16 bits wide, for example-many buses also include other nondata signals like control, parity, frame and status, he said.

Transmitting this nondata information traditionally requires adding another serdes link in parallel, which increases system cost and design time. Now system designers can use the company's 18-bit serdes to serialize their extra signals together with their data at the existing system data bus clock frequency. Available today, the DS92LV18 is offered in an 80-pin plastic quad flat pack. It is priced at $9.95 each in 1,000-unit quantities.

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