Misconceptions abound when it comes to integrating analog functionality onto an IC, particularly when it comes to the amount of functionality that can be integrated, the manufacturing volume needed to make it economically practical, the extent to which a product can be differentiated from the competitive devices, and the need for “hand-crafted” analog functionality.
Alas, some of these can form imaginary roadblocks to progress, so let's address some of them head-on:
1. It is only economical to integrate analog functions into an ASIC if the analog content is minimal. Because stand-alone analog ICs are relatively expensive (witness the high-gross profit margins posted by most of the “dedicated” analog chip companies) there has been a growing desire among customers to engage in all analog ASICs (application specific integrated circuits). Unfortunately, these same IC companies set high ASIC barriers regarding who can access this capability and impose large up front NRE (non-recurring engineering) costs and tooling fees coupled with mandatory high-volume usages.
To get enough “value” into the ASIC to justify these initial up-front costs, the customer often has to include large digital functions in the design which then often restricts the performance of the analog portion due to the requisite manufacturing processes used.
The reality is that many independent ASIC companies focus on full-custom, all-analog designs and offer attractive solutions for low- and medium-volume requirements. With a little research, you can find the perfect solution for your analog integration needs. One of the beauties of developing an all analog ASIC design is that it is relatively inexpensive. Analog ICs are typically produced in processes that have been around for many years, even decades. The capital equipment has been fully depreciated, reducing manufacturing costs to little more than pure variable costs. Typical engineering and production tooling costs for a full custom analog ASIC can run from $125K to $350K, making them very competitive alternatives.
2. Only ultra-high volume applications can benefit from analog ASICs. The semiconductor industry operates in alternating cycles of boom and bust. A brief look back in time reveals that in boom times, capacity at the big Asian foundries fills quickly and all but the most promising, high-volume customers are turned away. Aggregators have somewhat mitigated the problem by combining numerous smaller company requirements under the umbrella of their larger purchasing power.
However, the large Asian fabs (IC fabrication plants, also called foundries) are built to benefit from economies of scale, offering processes tailored for the mass market; high-density, low-power logic. For many wafer foundries, pure analog is problematic if it cannot be produced on their high-volume, fine-line, low-voltage processes. Fortunately, there are bountiful alternatives.
Throughout the world and in particular in Silicon Valley, there are numerous “boutique” wafer fabs that specialize in analog processes and are not loathe to accepting lower-volume business. Considered a well-guarded secret by many, these fabs welcome low- and moderate-volume analog business and offer pricing quite competitive with the billion-dollar fabs in Asia.
These smaller fabs have come to realize that while analog designs are often focused on lower annual volumes, analog in general has shown to be less susceptible to the violent supply/demand curve swings inherent to the general semiconductor industry. An additional attribute is that analog designs, unlike their digital cousins, can sometimes remain in production for as long as 10 years or more. For the wafer foundries, accepting reduced annual volumes becomes an annuity that offers payback for years to come. Experienced analog ASIC companies have spent decades nurturing these relationships for their customers.
3. Cell-based ASIC designs ensure product differentiation Designing an analog ASIC using a cell library is tantamount to designing a system using standard, off-the-shelf, analog ICs with one key exception: selection. At the board level, there are tens of thousands of IC amplifiers, voltage references, converters, and more from which to choose. In a cell library, the designer is limited to choosing from a few of dozen amplifiers, voltage references, converters, etc. Performance compromises may be needed to accommodate these limited choices.
Custom analog ASIC development affords a perfect opportunity to rise above the competition. If you and your competitors are basing your designs around the same mixed-signal cell libraries, both of you will have approximately the same performance specifications, dictated by the specifications of the library cells.
True product differentiation comes from invention. It is derived by creating a uniqueness not readily available to the competition. cell libraries fail to deliver the necessary uniqueness. Full custom analog designs allow the designer (or design team) infinite flexibility to impart into the IC new levels of elegant simplicity while maintaining superior performance metrics, and all of this comes at a very competitive price. Learn more in myth No. 4: Handcrafted analog is too expensive (below).
4. Handcrafted analog is too expensive, compared to standard cells. There is a time and place to use analog library cells:
- When the analog functions are a very small percentage of total chip being created and their use is necessitated by the dominate digital design requirements;
- When the performance of the analog functions in the design are all of a non-critical nature.
NRE costs are a compilation of several variables. These costs must be amortized over the number of chips produced during the lifetime of the product to determine their effect on the unit cost of the ASIC. When executed properly, NRE costs associated with handcrafting the analog circuitry will return a disproportionately lower unit cost of the final chip in terms of reduced die size and higher yields. The key to success is the extent of the analog design experience resident at ASIC house doing the integration. With engineering and production tooling costs typically in the range from $125K to $350K, even low-volume applications can benefit.