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A Simplified Algorithm for State Space Circuit Analysis

Spice-derived software packages are the de facto industry circuit-analysis tools. The primary advantage of these simulation tools is that virtually no circuit analysis algebra is required. However, the question might then be asked, what purpose is served by creating an analysis technique that minimizes, but does not eliminate, equation-writing? Educational aspects aside, Spice software produces significant errors when performing ac worst-case analysis. In addition, Spice Monte Carlo analysis is limited to 400 samples, which from statistical confidence intervals is clearly insufficient. Hence, the rationale is to provide an easily programmable circuit-analysis method as a foundation for improved tolerance-analysis procedures. In addition, Spice may not be readily available due to network queuing, downtime, or the software simply has not been purchased, which is the case in some small companies.

DC Superposition (DS) Method

State-space techniques have long been a mainstay of automatic control theory, but are seldom used in the workplace for circuit analysis. One of the reasons for this is the extent of algebra required to create the arrays for higher-order circuits in the form:

To alleviate this difficulty, we introduce the DS method using the example circuit shown in Figure 1 , a dual active LC filter.


Figure 1:  Schematic of a dual active LC filter

The customary state variables are the capacitor voltages and inductor currents. The state variables, iL1 , vC1 , iL2 , and vC2 , are given by:

An algorithm suggested by DeRusso et al for calculating the A, B, D, and E arrays, using dc analysis of resistive networks is presented here. The method is easily programmable and begins by converting an RCL circuit to a pure resistive circuit by replacing the inductors with ideal independent current sources and the capacitors with ideal independent voltage sources. The resulting dc circuit is solved using superposition.

The converted dc circuit is given in Figure 2 . The inductors are replaced with 1A current sources, capacitors with 1V voltage sources. Note the 0V node due to the ideal op amp. Ein1 and Ein2 are temporarily set to 1V.


Figure 2:  LC filter of Figure 1 converted to a purely resistive circuit

Some symbol definitions follow:

N = order of the circuit = the number of inductors and capacitors = 4

M = number of independent inputs = 2

K = number of outputs = 1

U = number of unknown nodes in converted circuit = 5

Y = output node = 5

There are U+N = 9 unknowns: V1 through V5, eL1, iC1, eL2, and iC2 (Note: Subscripts are eliminated to improve readability).

Write U+N = 9 dc circuit equations from both Figures 1 and 2 .

Rearrange all nine of the above equations so that unknowns are on the left-hand (LH) side and the M+N = 6 known inputs (Ein1, Ein2 E1, E2, I1, and I2) are on the RH side. For example, Equation 1 would become:

Convert all resistances to conductances such that 1/R1 = G1, 1/R2 = G2, and so on. The previous equation then becomes:

V1 × G1 = Ein1 × G1 – I1

Create an array A1 for the LH-side unknowns with dimensions {U+N U+N} = {9 9}, or nine rows and nine columns. Place the unknown coefficients for Equation 1 in row 1, the unknown coefficients for Equation 2 in row 2, and so forth.

As a memory aid, label the unknown columns as follows:

Note that Row 6 of A1 comes from Equation 6 and so on.

For the RH side of the above equations, we create an array B1 with dimensions {9 1}.

Note that Row 1 contains the RH side of Equation 1 , Row 2 the RH side of Equation 2 , and so on.

Using superposition, expand B1 into array B2 with the same number of rows and N+M = 6 columns. Use column labels as shown for the following array.

I1 occurs in Row 1 of B1, so we place it in Row 1 column 1 of B2. The 5th column is used to place Ein1 approximately equal to G1, and so forth. The inputs, Ein1 and Ein2, are placed in the last two columns. B2 is then:

Column labels:

B2 is just a column blowup of B1 with the known inputs activated in their separate columns. Every column must have an entry, but not necessarily every row. With practice, you can omit creating the B1 array.

The last preparatory step is to form an {N N} diagonal array P as follows. The order of the inductances and capacitances must follow the order of the corresponding first N columns of B2, in other words, L1 corresponds to the current source I1 from which L1 was converted, C1 corresponds to voltage source E1, and so on.

It is important to note that if the matrices are correctly constructed up to this point, the rest of the analysis, dc, ac, and transient, is automated or “cookbook” and, hence, is guaranteed to be correct. The following equations need only be copied as a template and will work for every circuit analyzed.

A sub-matrix extraction routine is used five times. In Mathcad, this routine has the syntax:

small matrix = submatrix(large matrix, FROM row, TO row, FROM column, TO column)

The component values used are: R1 = 7.5 ohms, R2 = R1, R4 = R1, R5 = R1, R7 = 19.05K, R3 = 10Kohms, R6 = 10Kohms, L1 = 270µH, L2 = 330µH, C1 = 0.1µF, C2 = 0.5µF.

For the sake of brevity, the expressions following are given without derivation or proofs and are in Mathcad format:

V = A1-1 × B2

H = submatrix(V,U+1,U+N,1,N+M)

AB = P-1 × H

A = submatrix(AB,1,N,1,N)

B = submatrix(AB,1,N,N+1,N+M)

D = submatrix(V,Y,Y,1,N)

E = submatrix(V,Y,Y,N+1,N+M)

The A, B, D, and E arrays are:

DC Solution

Ein1 and Ein2 can now be set to desired values: Ein1 = 0.8; Ein2 = 1.3; array u becomes:

The dc state variables are obtained by setting dx/dt = 0 in:

dx/dt = Ax + Bu = 0, or x = X= -A-1 Bu       XT = [79.94uA  0.8V  129.9uA  1.3V]

That is, iL1 = 79.92uA, vC1 = 0.8V, etc.

The dc output is Vo = D × X + E × u = -4.00V. As a check, note that:

Frequency Response Solution

We can immediately obtain the denominator roots of the transfer function from the Eigenvalues of A, which are 30629.4 Hz, and 12390.2 Hz. On the ac frequency-response plot we should expect to see poles at these locations.

Background

Starting with dx/dt = Ax(t) + Bu(t), take the Laplace transform with initial conditions zero:

Dropping the (s) notation, let G = sI – A)-1 , x = GBu

Then

y = Dx + Eu = DGBu + Eu     (10)

Calculation

BF is the log of the beginning frequency, ND is the number of decades, PD is points per decade. Let BF = 3, ND = 2, and PD = 50. Create a frequency counter i: i = 1,…,ND approximately equal to PD+1. The log frequency is Li = BF + i-1 / PD and the frequency in Hz is then Fi = 10Li . The Laplace variable s = jT is given by si = 2p Fi square root -1. From Equation 10 , the magnitude of the output is:

yi = |DG(si )Bu + Eu|, which is plotted in Figure 3 below.


Figure 3:  Plot of output voltage vs. frequency (log scale) for the LC filter

Time Response Solution
Background

Approximate dx as )x and dt as )t. Then initialize x1 = constant (usually zero) and iterate:

D x1 = A × x1 + D t + B × u × D t, x2 = D x1 + x1

D x2 = A × x2 + D t + B × u × D t, x3 = D x2 + x2 , combining:

x2 = (A × x1 + B × u) × D t + x1 , x3 = (A × x2 + B × u) × D t + x2 , etc.

In general xk = (A × xk-1 + B × u) × D t + xk-1 , where k = 2, 3, …kmax .

Calculation

To insure convergence, )t must be less than the inverse of the largest absolute value of the elements in the A matrix. The largest element is in A and is slightly less than 107 , hence a )t of 0.1µs is satisfactory.

The maximum number of time points (kmax ) is set to 3000. The period T is then T = kmax approximately = )t = 300µs. Delayed steps are used as inputs and are functionally formed by:

VS(t,w,E) = E × F (t – w), where F (x) is the Mathcad unit step function. The two step inputs are then Ea(t) = VS(t,0.05T,Ein1) and Eb(t) = VS(t,0.15T,Ein2). The iteration is started by initializing for k = 1: (Mathcad format)

where I1 is iL1 , V1 is vC1 , etc., and continues with k = 2, 3,…kmax

The output is:

The delayed step inputs, inductor currents, capacitor voltages, and output are given in Figures 4, 5, 6, and 7 respectively.




Figures 4-7:  Delayed step-input response (top 1) and time responses of the LC filter showing inductor currents (top 2), capacitor voltages (bottom 1), and output voltage (bottom 2)

CAVEAT: When using state-space methods, beware of circuits in which there is an all-inductive cut-set (two or more inductors connected to the same node), or an all-capacitive loop (two or more capacitors connected in parallel). The reason for caution becomes evident when using the DS method, as a cut-set of inductors becomes two or more ideal independent current sources connected to the same node, and an all-capacitive loop would be converted to two or more ideal independent voltage sources in parallel. A series ESR resistor (almost equal to 0.01 ohm) for the capacitors and a parallel “de-Qing” resistor for the inductors will avoid this constraint.

Conclusion

The DS method provides the A, B, D, and E arrays with a minimum of algebraic manipulation. These arrays are formed by superposition requiring only simple dc nodal equations at the start. The dc, frequency-domain, and time-domain responses are automated. The A matrix supplies the Eigenvalues (roots of the characteristic equation). You can get the circuit transfer function using Leverrier's algorithm. The complete procedure is easily programmed using math software packages such as Mathcad or MATLAB.

2 comments on “A Simplified Algorithm for State Space Circuit Analysis

  1. nowacki.bartosz.agh
    January 3, 2014

    Hello, 

    Is it possible to restore reference links? Now these resources are missing, and it makes some issues hard to understand. 

    Additionally, I would like to point out inaccuracy in matrix constructions. In B2 matrix there are inputs placed in, but in real application it cannot be done because input will vary with time. Therefore for preprocessing inputs should be set to 1 using this notation, or inputs voltages should not be put explicitly into B2 matrix, just conductances.

     

    Moreover, i am trying to apply this method to some other circutis, eg. Sallen Key filter to provide simulation. Unfortunately, this method looks unstable and differs from “clean” MNA approach. Rerence materials are necessary to verify wheter it is my fault, or something in article is unclear.

    Looking forward for feedback,

    Bartosz Nowacki

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    August 16, 2015

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