In our quest for a 12-bit system to handle handheld meters, data loggers, automotive systems, or monitoring systems, we used 12-bit ADCs to solve our problem. The system we are designing today must produce 4,096 (2¹² ) possible digital outputs to a microcontroller or processor.

What if we took an unorthodox approach by using a 16-bit converter to tackle this problem? Since each system needs an input multiplexer and the capability to produce gain changes from 1 to 128V/V, we may need additional components in the system. A 16-bit successive approximation analog-to-digital converter (SAR-ADC) is a good place to start.

In ADC Basics, Part 8, we looked at a system with an input multiplexer, followed by a programmable-gain-amplifier (PGA). The signal went into a 12-bit SAR-ADC. In our second system, ADC Basics, Part 9, an 8-channel, 12-bit SAR-ADC allowed the inclusion of an analog function between the multiplexer and ADC. Embedded in this space was a single-channel PGA and an ADC driver operational amplifier (op amp).

16-bit converter plus PGA
To that end, our third system (Figure 1) has a 16-bit SAR-ADC and PGA; all to achieve a system gain of 16V/V. For this circuit, the gain configuration for the PGA (PGA116) is 4V/V, and the ADC (ADS8326) process gain is 4.

At the input stage of this system, there is a 10-channel PGA. Although this device can render gains from 1 to 128V/V, in this circuit the gain will be from 1 to 32V/V. The SAR-ADC absorbs the remainder of the gain, from 1 to 4, with a process gain technique. The main advantage of the PGA is to provide a 10-channel multiplexer. Following the PGA is an ADC driver amplifier. This amplifier, along with the R/C pair (100-Ohm and 680 pF), drive the signal into the 16-bit ADC.

Gain – analog and digital
In this system, the PGA and SAR-ADC share the implementation of the system gain. The total gain in this system is equal to the PGA gain times the SAR-ADC process gain.

You achieve the action of setting the gain for the PGA digitally through the SPI interface. Any gain or multiplexer channel changes impact the throughput time of the entire application.

The SAR-ADC also carries partial responsibility for the gain implementation (Figure 2). The number of 12-bit words available at the output of the 16-bit SAR-ADC is five. As you collect that digital code from the output of the SAR-ADC, you can increase the process gain by shifting the MSB position to the right.

The ADS8326 has a noise level of 3 LSB (p-p) or 0.6 LSB rms. Because of this noise performance level, bit1 is not usable in this application.

In Part B, we will continue our analysis of the system with a look at noise: sources and effects.

Related posts:

• ADC Basics, Part 1: Does Your ADC Work in the Real World?
• ADC Basics, Part 2: SAR & Delta-Sigma ADC Signal Path
• ADC Basics, Part 3: Using Successive-Approximation Register ADC in Designs
• ADC Basics, Part 4: Using Delta-Sigma ADCs in Your Design
• ADC Basics, Part 5: Key ADC Specifications for System Analysis
• ADC Basics, Part 6: Key Op-Amp DC & AC Specifications
• ADC Basics, Part 7: Key Op Amp Frequency & Timing Specifications