ADC Basics, Part 9: PGA Embedded in an 8-Channel, 12-Bit SAR

We are looking for 12-bit systems that are appropriate for handheld meters, data loggers, automotive systems, or monitoring systems. These systems must produce 4,096 possible digital outputs to a microcontroller or processor. That is an easy task to achieve; however, there is more to the system than a simple 12-bit conversion. Each system has an input multiplexer and should be capable of producing gain changes from 1 to 128 V/V.

In ADC Basics, Part 8: A 4-System Matrix With PGA + 12-bit SAR, we looked at a system with an input multiplexer, followed by a programmable-gain-amplifier (PGA). The signal went into a 12-bit successive approximation analog-to-digital converter (SAR-ADC). This system worked well enough, but let's looks at a different design strategy.

In our second system, an 8-channel, 12-bit SAR-ADC allows for the inclusion of an analog function between the multiplexer and ADC. Embedded in this space is a single-channel PGA and an ADC op amp (Figure 1). Once again, the power supply in this system is 5V. The system programmable gain range is 1 to 128.

Figure 1

Multiplexed, 12-bit ADC-SAR with an embedded PGA gain cell

Multiplexed, 12-bit ADC-SAR with an embedded PGA gain cell

PGA embedded in a 8-channel, 12-bit SAR
In Part 8, the system had a gain range of 1 to 128V/V. We found that at a gain of 16V/V accuracy was 0.006 percent, while producing 11.97 effective bits. The analog output swing was limited, but not enough to impact the amplifier and ADC offset and gain errors. Finally, the system had a very low-cost factor, reasonable power-down capability, and excellent noise performance.

In Figure 1, the signal starts at the ADC's multiplexer. The embedded PGA picks up the signal and applies a gain from 1 to 128. The PGA ports the signal to the input of the ADC op amp. The ADC op amp, in combination with the following R-C stage, drives the signal to the SAR-ADC's input. The input resistor/capacitor pair at the op amp (100Ω and 390pF) output provides resistive isolation between the amplifier and the 390pF capacitor, as well as a charge reservoir (the 390pF capacitor) for the converter's input (Ref. 1).

Noise generators in this circuit are the PGA, ADC op amp, and the 12-bit SAR-ADC. In terms of noise, the only component that changes with this system evaluation is the PGA. The change in PGA output noise with gain equals Equation 1:

In Equation 1,

  • PGANOISE(RTO) = PGA output noise
  • PGAGAIN = PGA gain
  • PGANOISE(RTI) = PGA input noise = 12 nV/√Hz
  • PGABW = PGA close loop bandwidth (depends on gain setting)

The ADC op amp noise and SAR-ADC noise are consistent across all gain changes. These noise values are equal to 13μVRMS and 460μVRMS, inclusive. Table 1 shows system noise versus PGA gain in Figure 1.

Table 1

Noise performance over PGA gain options

Noise performance over PGA gain options

System timing
As the input multiplexer of the ADC (ADS7951) changes, there is a possibility that the PGA will see a step response. Consequently, the signal at the beginning of each conversion should be allowed ample time to settle. The settling time for the PGA in a gain of 16V/V is 2.6μs (typ.). Additionally, if the PGA gain changes, the device requires 16 clocks for the change. The programming time for this system will be worst case PGA settling/gain select times, which are collectively equal to 3μs.

The unity gain bandwidth of the amplifier (voltage feedback amplifier) is 38MHz. This wide bandwidth complements the SAR-ADC's conversion speed of 1Msps and acquisition time of 325ns. The settling time of this driver amplifier in a gain of one is equal to 0.5μs. Combining this with the settling time of the PGA you get Equation 2:

If a 30 percent guard band is added to this system, the settling time becomes 3.95μs or about 4μs.

In the SAR-ADC's conversion/mux switching algorithm, the converter samples the input signal and then immediately switches channels. This algorithm provides time for the PGA to settle and prepare for the next conversion.

The acquisition of the input signal occurs with the falling edge of chip select (CS) (Figure 2). During the following 16 clock pulses, the converter samples the input signal. Shortly after the signal acquisition, the multiplexer switches to the next setting. At the same time, serial data in (SDI) receives instruction for the next multiplexer setting, which is implemented after the following signal acquisition. In the following clocks, the ADC transmits the digital output word through the serial data out (SDO) pin.

Figure 2

Timing sequence of Figure 1 circuit with a throughput speed of 250 ksps

Timing sequence of Figure 1 circuit with a throughput speed of 250 ksps

When the PGA is on, its power dissipation is 7.5mW. If the PGA is put to sleep digitally or with the sleep pin, power dissipation is 20μW. The SAR-ADC has similar states. As the ADC is operating, its on power dissipation is 14mW. While the ADC is off, power dissipation is 5μW. Finally, this high-speed amplifier has no shut-down capability. The power dissipation of this device is 37.5mW. All power values stated above or typical numbers. Conclusion
This system's accuracy in terms of noise exceeds expectations. The OPA350/ADS7951 combination remains well under the one least significant bit (LSB) mark for a 12-bit system. The dynamic range again is very good, ranging from 5 volts (FSR) with a gain of 1 to 0.039V (FSR) with an analog gain of 128.

Figure 3

Equivalent bits vs. PGA gain

Equivalent bits vs. PGA gain

Referring to Figure 4, there is little difference between the DC specifications from this article's system and the system in “ADC Basics, Part 8.” The system from this article surpasses the other system in terms of noise and sampling speed.

Figure 4

System specifications for Figure 1 circuit from this article (b), and system specifications for Figure 1 circuit from 'ADC Basics Part 8' (b)

System specifications for Figure 1 circuit from this article (b), and system specifications for Figure 1 circuit from “ADC Basics Part 8” (b)


  1. External components improve SAR-ADC accuracy, Baker, Oljaca, EDN, June 7, 2007.
  2. Download these data sheets: OPA350, PGA112, ADS7951.

Related posts:

10 comments on “ADC Basics, Part 9: PGA Embedded in an 8-Channel, 12-Bit SAR

  1. eafpres
    October 7, 2013

    Hi Bonnie.  Nice explanation of the details of the circuit design.  I was wondering if there would be any particular consideration of calibration that you would add into the design?  Have you used such a design with any kind of built-in reference?  I would think in some cases the added uncertainty of calibration might shave a half bit or bit off the total resolution.

  2. Bonnie Baker
    October 8, 2013


    This is a great question. Calibration certainly is an option with this circuit. The PGA116 has the capability to calibrate system gain and offset errors. This is a nice feature. This calibration is done with an external reference to CH0 of the PGA. In terms of “shaving” bits off the total resolution, it is possible that that would happen, however the offset and gain errors in the system will automatically can this type of error. The calibration would not.  

  3. samicksha
    October 9, 2013

    Thanx Bonnie and if i am not wrong this version has capability of internal calibration channels for system-level calibration and i understand an external voltage connected to Channel 0, is used as the system calibration reference.

  4. goafrit2
    October 10, 2013

    My boss told me that calibration is expensive and I must make my specs and then design to be insensitive to the need of calibration. When you work in consumer electronics, you need to live in a world where calibration is not an option. We need to teach that in colleges.

  5. Bonnie Baker
    October 10, 2013


    You are correct.

  6. Bonnie Baker
    October 10, 2013


    I think that I agree with your boss. I always design with the thoughts that calibration is a last, very last resort. I actually spend my time up front and find the correct products for my circuit. If you plan to calibrate there is a chance that you will need additional parts in your circuit to achieve your goal and an even better chance that it will take time. In other words, the calibration activities require time to process and it is possible that the controller or processor in your circuit will be involved.

  7. Davidled
    October 10, 2013

    ->Calibration activities require time to process and it is possible that controller or processor in your circuit will involved.

    Well, I would image that Automatic calibration is possible instead of manual calibration via controller process such as PID for A/D resolution or bit error and other method.

  8. eafpres
    October 10, 2013

    @Bonnie & goafrit2–I would agree that if you can use an internal reference or nothing at all that is great.  I also agree for many applications, especially consumer electronics, precise calibration isn't needed at all.

    I used to work in a startup developing chemical measuring instrumentation.  Our main product line was a water analyzer, but for very pure water.  Our customers were pharmaceutical makers, biotech, as well as semiconductor fabs.  All those applications require water free of impurities at the part per million or better level.  We took great care in comissioning, stabilizing, debugging, and finally calibrating the instruments before shipment; the constants were stored in an EEPROM and printed for the customer. In some applications they were required to run check standards (especially pharma) anyway, but the intent was they would not actually recalibrate.  In the semiconductor applications, they ran the instruments on-line and rarely re-checked.  

    Eventually we shipped a design that could measure in the parts per trillion range and did not require recalibration by the user.  Lots of things have to be designed well for that sort of outcome.

  9. yalanand
    October 27, 2013

    The key PGA features are low noise crossways its entire advance range and a fast throughput rate. The driver amp and resistor/capacitor pair provides ample control to the 12-bit ADC.

  10. Bonnie Baker
    October 27, 2013


    Thank you for reading a commenting on this article. In terms of the PGA key features, the manufacturer claims many performance points, such are rail-to-rail output performance, low offset and drift, and a low referred to input noise of 12 nV/RtHz at 10 kHz. This is only the first four key features that they talk about. They also mention 14 more.

    The through put rate maxes out at 1.6 usec, and that is with a 10 MHz clock. This is fast, however you do have to wait for the analog output to settle if you are using the input multiplexer or changing gains. This can add to your throughput time about 4.2 usec.

    As for the drive amp, the R/C following the amplifier serves two functions. The capacitor provides enough charge for the ADC conversion process and the resistor “isolates” the capacitor from the output of the amplifier. This isolation activity insures amplifier stability so the amplifier is able to settle quickly.

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.