As I read over the comments from my last blog, ADC Noise: Where Does It Come From?, it became apparent that I had not covered all the potential doorways for noise in an ADC. There are a few more doors that we must consider. Thanks to folks for pointing out a few and for helping me to get my thoughts in order to look at a few more places I had missed previously.
As I commented last time, when considering noise in an ADC, one can almost consider the ADC as a mixer. If there is noise entering the ADC from any one of the various doorways, then it can manifest itself in the FFT of the output data. Let's now take a look at a modified version of the figure I introduced in my last blog.
Figure 1 shows the noise doorways that we discussed previously, which included the power supply inputs, the analog inputs, and the clock. However, there are a few more doorways that I missed that we should definitely consider when working with an ADC. The first is the common mode voltage (Vcm) output that supplies the common mode level for the analog inputs. Next there are the digital inputs and outputs (I/Os) which can be a pathway for noise into the ADC. Last, there is a doorway that is probably one of the most overlooked — the ground or circuit-common.
The Vcm output is used by many high-speed ADCs today to provide the common mode reference voltage for the ADC analog inputs. It's a midpoint voltage within the minimum-to-maximum range of the ADC's inputs. This pin usually requires a decoupling capacitor of about 0.1μF. This provides a dominant pole for output stability as well as filtering of higher frequency noise. It is important to have proper decoupling, as this node provides a potential direct line for noise into the ADC analog inputs. And even though it's an output, noise can force its way in to the internal bias circuitry of the ADC.
In addition to the capacitor, many ADCs with two or more channels also require a small amount of resistance in series with each connection from the Vcm output to each of the channels. This is also a form of noise reduction as it typically helps with reducing the crosstalk between the channels of the ADC. Another way to say this is that the additional series resistance helps improved channel-to-channel isolation so that the signal from one channel doesn't make its way to another channel.
In the next part of this blog, we'll look at the digital I/O lines (including the SPI) of the ADC and consider how they can also provide a doorway for noise. And we'll finish by looking at the ground connections.
- ADC Noise: Where Does It Come From?
- Interleaving Spurs: The Mathmatics of Timing Mismatch
- Interleaving Spurs: More Math Details for Gain Mismatch
- Interleaving Spurs: Let’s Look at the Math
- Interleaving Spurs: Bandwidth Mismatches
- Interleaving Spurs: Timing Mismatches
- Interleaving Spurs: Gain Mismatches
- Interleaving Spurs: Offset Mismatches
- More Thoughts on Interleaved ADCs
- Interleaved ADCs: The Basics
- LVDS Is Dead? Long Live LVDS & JESD204B
- Signal Chain Basics #82: Crosstalk Between Outputs in Clocking Devices