In the previous part of this blog (ADC Noise: A Second Look, Part 1) we looked at some of the ways noise can sneak into an ADC through its input and output connections. We'll continue by looking at the digital I/O lines and finish by looking at the ground connections.
The digital I/O lines of an ADC are also doorways for noise. There are several different functions for digital I/O and therefore different ways for noise to enter the ADC through each. The most obvious is the digital output interface. This is much more of a concern on ADCs with CMOS outputs due to their single-ended implementation.
Typically, ADCs with LVDS outputs or those that employ the serial JESD204B interface are much more immune to noise coupling. In addition to the digital outputs, there is an increasing amount of digital circuitry within the ADC itself that offers some potential entry points for noise through the control lines. With this increased digital content comes the need to provide I/O for these functions. Sometimes the additional I/O is done through the SPI (serial port interface). And sometimes, the SPI isn't quite able to handle all that's required.
A side note about SPI: Not only is the SPI a potential noise doorway, it can cause other conversion problems. Various recommendations say to not access the SPI of the ADC while in system operation (while conversions are taking place).
Other I/O include mode control, power-down, standby, over range indicator, synchronization pins, etc. These are all things to pay attention to and make sure proper decoupling is used in addition to good layout practices to avoid noise coupling.
Probably the most overlooked doorway (and I certainly overlooked this myself last time) is the ground of the ADC. And please note that when I say ground, I'm referring to circuit common. Note also that there are usually multiple ground connections such as analog ground and digital ground. For these two grounds, you sometimes need to consider where they are bonded or tied together. This is a topic for another blog sometime.
Ground is often thought of as naturally being a solid reference point. However, the ground is not always a stable reference point and can allow noise to enter the ADC. It is important to pay attention to the ground planes in the system design and layout in order to make sure there is sufficient plane area without breaks and with sufficient ground vias to allow for proper current return paths. It is imperative to consider all the current return paths in the design rather than to assume the ground is a stable reference point.
Without proper system design, noise can be present in the ground plane and can make its way into the ADC. Have a look at Bill Schweber's blog, (Under)standing Your Ground, and Bruce Archambeault blog, The Ground Myth, for some additional insight into the topic of ground, ground currents, ground impedance, and E-M fields. Bruce specifically discusses how the current flowing in a trace interacts with the ground or power plane in the layer right below the trace and how that may cause problems.
Current that is flowing somewhere other than where you think it will or should be flowing is not actually noise in the strictest sense, but it is clearly trouble.
Now I think we are armed with all the information we need to properly consider the noise doorways into an ADC. Let's continue our journey and begin looking at each one of these doorways in more detail. Thanks once again for the great comments; please keep them coming. I think we will have lots of fun and will learn much about the different ways noise can enter an ADC and what we can do to combat the noise so we have a good system design.
- ADC Noise: A Second Look, Part 1
- (Under)standing Your Ground
- The Ground Myth
- ADC Noise: Where Does It Come From?
- Interleaving Spurs: The Mathmatics of Timing Mismatch
- Interleaving Spurs: More Math Details for Gain Mismatch
- Interleaving Spurs: Let’s Look at the Math
- Interleaving Spurs: Bandwidth Mismatches
- Interleaving Spurs: Timing Mismatches
- Interleaving Spurs: Gain Mismatches
- Interleaving Spurs: Offset Mismatches
- More Thoughts on Interleaved ADCs
- Interleaved ADCs: The Basics
- LVDS Is Dead? Long Live LVDS & JESD204B
- Signal Chain Basics #82: Crosstalk Between Outputs in Clocking Devices