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ADC’s Analog-to-Digital Converters basics

As much as it’s an analog world, it is often being chopped up into digital pieces. As communications go digital and the computing power increases, signals are being transformed into digital words that are easier to transmit and compute mathematically. The process of converting signals is an analog to digital process that gave rise to Analog-to-Digital Converters or ADCs.

A digital signal synchronizes to a clock frequency. According the Nyquist criteria, ADCs sample at a rate of at least twice the highest frequency of the analog input signal that is to be digitized. This frequency is called the Nyquist sampling rate.

Developing a Sampling Rate with an ADC (Image courtesy of Reference 1)

Developing a Sampling Rate with an ADC (Image courtesy of Reference 1)

ADC granularity increases with sampling rate and resolution as shown in the diagram below. The y axis is the resolution which is actually the number of bits of the ADC. The x axis is the sampling rate.

ADC Accuracy Depends on the Sampling Rate and Resolution (Image courtesy of Reference 1)

ADC Accuracy Depends on the Sampling Rate and Resolution (Image courtesy of Reference 1)

The number of bits is defined in powers of two. Therefore an 8-bit ADC would have 28 or 256 bits of resolution. For a simple 3-bit ADC converter, the resolution is shown in the stairstep analogy below where digital words are shown on the y axis versus the signal voltage range and increments on the x axis.

ADC Digital Code Versus Input Voltage (Image courtesy of Reference 2)

ADC Digital Code Versus Input Voltage (Image courtesy of Reference 2)

For those just experiencing digital signaling, one can see how the binary use of “ones” and “zeros” is merely a way of turning a switch on as a “one” bit and off as a “zero” bit. This is a departure from our base ten counting system that originates from the number of digits on a human hand. A ten position switch is not easily implemented in electronics. Thus, the focus has centered on faster switching transistors and resulted in the frequency increase craze.

Several factors come into play when digitizing a signal. These create errors such as quantization error between the levels of voltage detection. Other errors include non-linearity of the signal. Reference 2 outlines these errors in more detail.

Error is not limited to the analog side of an ADC. Noise and clock jitter affect the digital signal.

Sources vary on the types of ADCs. The basic types of ADCs include:

  1. Flash ADC.
  2. Sigma-delta ADC.
  3. Dual slope converter.
  4. Successive approximation converter.

ADCs are chosen based on speed and accuracy. The more bits in the ADC, the higher the accuracy and the slower it is as each bit adds a clock cycle. The various types of ADCs are compared for speed and accuracy in the following figure:

Comparison of ADC Technologies (Image courtesy of Reference 1)

Comparison of ADC Technologies (Image courtesy of Reference 1)

Although ADCs are digital devices, there is a wealth of analog technology at the front end of each technology. The details go beyond this basic introduction. Many of the ADC companies have tables that assist in the selection process. In addition, the type of communication bus that is available helps the selection process as many of the serial links are bandwidth or bit count limited. As with anything, the more performance and speed that is required, the higher the complexity and cost. This has resulted in a growing market of ADCs that expands with the applications much like the sensor market. Also like the sensor market, ADCs are improving as technology enables better functionality.

References

  1. “Analog to Digital Converter, Georgia Tech, Mechatronics, Fall 04
  2. “Analog-to-digital converter,” From Wikipedia, the free encyclopedia

1 comment on “ADC’s Analog-to-Digital Converters basics

  1. Victor Lorenzo
    November 26, 2017

    Hi Scott, “The more bits in the ADC, the higher the accuracy and the slower it is as each bit adds a clock cycle ” holds true for many ADC architectures, but it does not for flash converters, with the exception of some half-flash adc's.

    Following the generalized concept of selecting the sampling frequency according to the Nyquist theorem is more complex than it seems at first sight. Yet we can reduce to negligible levels the “leakage” of high frequencies (above Nyquist) into the low band of the digitized signal's spectrum, sampling at roughly twice the bandwidth will not ensure the original signal will be reproducible back in the time-domain with a dac converter.

    Something I think will be interesting for other readers is the reasoning behind the choice of using or not one sample/hold or track/hold amplifier in front of the ADC, especially this days that most SoCs include at least one ADC and resolutions that reach 16, 18 and even more bits.

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