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Alternative methods of LCD control (Part 1 of 2)

Abstract

Multiplexed LCDs have been used for over 30 years, and the methods for driving them are well-known and remained unchanged for the past 20 years. Advancements in LCD materials and a new understanding of density modulation, however, allow for new digital approaches which are scalable with silicon processes and allow for more cost-effective designs. This article will demonstrate a conventional implementation and show two alternative approaches, requiring only digital signals, to drive the LCD.

The first approach relies on the correlated and uncorrelated nature of signals of different frequencies, while the second method exploits the low-pass nature of the LCD glass, allowing it to be driven with a density-modulated signal. The advantages of each technique–such as discrimination ratio, on/off voltage thresholds as function of supply voltage, level of multiplexing, and multiplexing types–will be explained. A working demonstration of all three types will be shown as well .

Traditionally, LCD control in microcontrollers has been accomplished through two different but primarily analog implementations. These implementations consist of either a resistor ladder or a charge pump, with the resistive-ladder implementation being the more common in the industry.

With a resistor ladder, a series of resistors are stacked among each other to create a large voltage divider where various taps are placed to obtain the multiple voltage levels that are then multiplexed (muxed) to the proper GPIO at the proper time to generate the required LCD control waveform, depending on the MUX value of the LCD. The chosen resistor values for the resistor ladder, which are implemented in silicon, have an effect on both the power consumption and the quality of the display image.

 An LCD is ideally a capacitive load. By choosing a resistor value that is too high, this can create a distorted waveform due the constant charging and discharging of the capacitive load. This can result in improper generation of the LCD control waveforms which impact viewing of the LCD display as some segments may appear more defined then others. By reducing the resistor values, waveform distortion can be reduced, but at the cost of increased power consumption.

The key is to find the balance between power conservation and LCD control-waveform integrity. Additionally, the cost to implement the required analog subsystem for an LCD drive can become quite costly in terms of the size of the subsystem in silicon. Taking a PSoC 3 controller, for example, the LCD architecture consumes about ~350k microns2 .

While analog LCD systems dominate the market, a growth in the understanding of density modulation, matched with new technology and manufacturing processes behind LCDs, allows for new approaches to driving an LCD efficiently.  For example, purely digital LCD control techniques can be applied to produce LCD control signals that, when observing an LCD, are indistinguishable from an analog-based approach. 

At the same time, the digital approach provides added benefits. Two different but similar implementations include Digital Correlation and Density Modulation .

Theory

Traditionally, the LCD charge pump or resistor dividers generate multiple bias voltages to produce a step like waveform as seen in Figure 1 .

Figure 1: Traditional analog control waveform

 The exact number of voltage steps depends on the desired bias level. The bias is the number of voltage steps to be applied to an LCD. The exact number is dependent upon the Mux Ratio, which is the inverse of the number of commons in an LCD. For example, a four-common LCD would have a mux ratio of 1/4.

 These multiple voltages are then used to maintain the proper voltage level to keep a segment on or off. The required number of bias per common can be calculated by Equation 1 .

Digital Correlation

While this method has the advantage of producing the highest discrimination ratio, it does so at the cost of potentially higher power and higher cost to implement on silicon. With Digital Correlation, rather than using various analog voltage levels, standard digital logic levels are used, and the LCD control waveform is generated by toggling between Vdd and Gnd at the appropriate times.

There are two primary advantages to this method. The first is that with this technique, it can be implemented with very limited hardware, such as a timer or PWM, with DMA, or with microcontroller-controlled firmware and ISRs. As a result, microcontrollers and FPGAs currently available in the market have the resources required to implement this control technique.

The second primary advantage to this method is that this implementation will easily allow the control system to drive the LCDs while in a low-power mode. When the device wakes upon the triggering of Timer ISR to begin the next sub frame, the control device just needs to adjust the GPIO to logic high or low level and then re-enter the low power mode. The GPIO will retain the state of the pin upon entering the low power mode, thus not requiring significant amounts of internal components to remain active during the low power mode.

Due to the simplicity of the housekeeping steps required for the Digital Correlation LCD control, minimal time in an active mode is required which maximizes power savings. To give an example of control waveforms used for Digital Correlation, refer to Figure 2 .

Figure 2: Digital correlation control waveform

The control waveforms are generated so the selected backplane (common) is correlated to the segment waveforms and uncorrelated when not selected. At the end of the sub-frame cycles, a dead-state cycle is implemented. Unlike the traditional analog method where a DAC is available to generate various bias levels, the proper on and off voltage levels need to be generated by adjusting the RMS voltage to the LCD.

Since the voltage across a segment is the difference of the segment and common (Seg-Com), by driving the two line to the same voltage level (either 5V or 0V) will induce 0V for a period of time, thus affecting the RMS voltage across the segment. Each segment in the LCD will have a Von and Voff threshold level. These threshold levels are determined by the Equation 2 and Equation 3 where ‘d ’ represents the number of dead states and ‘n ’ represents the number of commons.

 



The discrimination ratio, which is defined as the ratio between the VRMS(On) and V­RMS(Off)­­­­ , is important to know. The larger this gap is, the more defined a on and off segment will appear. If these two parameters are too close together, it can become difficult to distinguish between an on and off segment. Equation 4 is used for calculating discrimination ratio for Digital Correlation.

 

From this equation, one can see that as the number of commons on the LCD increases, the discrimination ratio decreases. This is true for the discrimination ratio in any control method. While the discrimination is far less efficient then the optimal analog control method, this is adequate for discrimination requirements of modern LCDs up to 4 commons.

Density Modulation

Using Density Modulation, comprised of PWMs in a system, waveforms similar to the traditional analog method can be generated. Ideally, the model of an LCD is a capacitor. However, due to the inherent properties of the LCD glass, the model of an LCD resembles a filter. These inherent properties of an LCD can be beneficial in this case. By varying the parameters of the PWM, the filter nature of the LCD can be used to produce DC voltages. Through this technique, a waveform very similar to the traditional analog method in Figure 1 is produced.

The biggest advantage to this method is cost. Since digital hardware is used to produce the waveforms, the digital components consume less die real estate then analog hardware. Earlier, an approximation of ~350k microns2 for PSoC 3 was given. By switching over to a purely digital system, it is estimated that this number can be reduced to about ~5.5k microns2 .

Implementing a digital system also involves considerably less risk in chip design then a corresponding analog counterpart. Note that this all comes at the cost of higher power consumption due to the higher clock speed required for clocking the PWM. However, adding additional resistors externally to the pins on the LCD can help scale the power consumption of this implementation, Equation 5 and Equation 6 .

 


This method allows for a higher discrimination ratio than the Digital Correlation, which will produce a much more defined display as Equation 7 shows:

 

                                                                        

(Part 2 will look in detail at an actual implementation.)


About the author

Robert Murphy is an Application Engineer at Cypress Semiconductor Corp. He graduated from Purdue University with a Bachelors Degree in Electrical Engineering Technology. Robert can be reached at .

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