As I sat on the plane heading back toward the East Coast, I thought back to my attendance at the IMS2013 show out in Seattle. The International Microwave Symposium is a tradeshow and conference that covers primarily RF technologies from VHF to terahertz and even optical. I had landed in Seattle on Sunday ahead of the show. I wanted to make sure I had time to get all the items I'd need to get the ADC and DAC demo circuits set up Monday before the exhibits opened on Tuesday morning. I helped out with the DACs because my colleague responsible for that was arriving later and would miss demo setup due to some customer obligations.
As I usually do, I had packed and shipped extras of my demo boards. I've been burned in the past when something happened in transit and I had some type of hardware failure. My motto is that it's better to have it and not need it than to need it and not have it. So Monday came, and the demo setup went well. I didn't have any issues with hardware, and I was able to get both the ADC and DAC demo circuits set up and running. Being the ADC guy that I am, I found DAC demo a bit more challenging to set up, but thanks to the crash course I had received the week before from our awesome DAC team, I was able to get things up and running.
Let's now move on to the exhibits on Tuesday. The show floor was a bit different this year. Two large areas were connected via a passageway. In the previous shows I've attended, the exhibit floor was one large open area. Nonetheless, there was a good amount of traffic on both sides of the floor this year. I had our latest single channel 14-bit 250 MSPS ADC with JESD204B, the AD9683, on display, along with the dual counterpart released in October, the AD9250.
As I discussed in my previous blogs, the migration to JESD204B is fast approaching. As expected, this has generated lots of questions. Several engineers in attendance were intrigued by the interface, the reduction in pin count, and the reduced package size it offers. I explained the basics of the standard to the visitors who dropped by the booth, and I told them how the migration to a serial interface is almost inevitable. A thought came to my mind about the USB serial interface. Who thinks of a parallel port on a PC these days? The interface of choice is high-speed serial. Taking a look in that direction gives us the emerging USB 3.0 standard, which extends the speed of the interface from 480Mbit/s to 5Gbit/s. But let's not digress too far in that direction.
In addition to those asking the high-level questions, I had some university students who were new to JESD204B drop by the booth. They were trying to get their ADC up and running with an FPGA development board, and they were having some issues with not-in-table errors. Being at a show without much data does make this difficult to debug, but I was able to point them in the right direction.
Usually, this type of error is a result of an improper initial lane alignment sequence (ILAS). This sequence occurs when the FPGA asserts the SYNC signal back to the ADC and triggers the ADC to start sending information in the ILAS over the JESD204B link to the FPGA. This is just a part of the transition over from LVDS to JESD204B as the interface does bring a learning curve for engineers. However, the benefits achieved with the transition to JESD204B open up pathways to much higher sample rate converters.
There were lots of great questions and conversations with some very sharp engineers at the show. Stay tuned for a few more thoughts and observations on the IMS2013 show in parts 2 and 3.