In An Approximation to the Aliasing Effect, Part 1: The Origin I revisited some basic concepts about the aliasing effect, though I did it from a more visual than theoretical perspective. This second part deals with some mitigation techniques in use today. These techniques help improve signal-to-noise ratio (SNR) and effective number of bits (ENOB) of digitized signals.
Let us continue with the same sample signals from the previous post and consider that all the information we are willing to extract ranges from DC-to-5 kHz (BW = 5kHz). As there are non-negligible frequency components above the bandwidth of interest, we must take care of them before sampling.
The first mitigation technique gets obvious here: Limit the input bandwidth. This is accomplished by using an analog filter before sampling.
There are several types of analog filters, and each filter approximation has its specific phase and ripple characteristics. One useful resource about filters is Chapter 8 of ADI’s Linear Circuit Design Handbook.
Selecting the most appropriated anti-aliasing filter could be a non-trivial task. The figure below depicts the frequency response for two filter approximations, Butterworth and Chebyshev Type-I, for two different filter orders, 2 and 4. The cutoff frequency has been selected at 5 kHz.
Note the pass-band ripple in the Chebyshev filter. I will not dig further into this subject as it was covered in Designing SAR ADC Anti-Aliasing Filters from Planet Analog’s Signal Chain Basics series.
The result of applying the second-order Butterworth filter with 5 kHz cutoff frequency on the sample signal is shown below. It can be seen how the 6 kHz tone has been reduced in amplitude though not completely removed. Note the 4 kHz tone has also been affected by the filter.
One obvious conclusion for this specific case is the need to use higher-order filters with sharper cutoff frequency edges.
Oversampling + digital filtering
Adding more analog filter stages can sometimes be impractical, even using readily available monolithic solutions. Raising the digitizer’s Nyquist frequency can be more appropriate and achievable in many cases. This technique is called Oversampling. Filtering the oversampled signal in the digital domain allows using higher-order filters. The next plot shows an example using a 25th-order Infinite Impulse Response (IIR) filter.
Note how the 6 kHz has been substantially attenuated while the 4 kHz tone alteration is almost negligible. The plot below shows in dB a segment from the same results set.
Oversampling has also been covered by our own Maithil Pachchigar in ADCs for High Dynamic Range: Successive-Approximation or Sigma-Delta?, Increase Dynamic Range With SAR ADCs Using Oversampling, Part 1, and Increase Dynamic Range with SAR ADCs Using Oversampling, Part 2.
There are applications where working with oversampled signals can compromise overall system performance. Downsampling can be used in those cases for reducing the sampling rate of the signal by an integer or rational factor.
It should be noted that downsampling a signal can be equivalent to the continuous time-sampling operation, especially in terms of the aliasing effect.
The process of reducing the sampling rate, combining the operations of low-pass filtering, and downsampling is usually referred to as Decimation.
The decimation operation can be done also by working in the frequency domain instead of the time domain. It is accomplished by calculating the FFT of a signal segment, manipulating its Fourier transform, and then calculating the inverse FFT, though it is not appropriate for most real-time signal processing applications.
Albeit these digital-domain techniques prove effective for improving signal quality, we still find applications where they are limited to mid- and high-end data acquisition equipment and devices. Up to just a few years ago, digital signal processing applications were dominated by Digital Signal Processors.
We should note too that many readily available general-purpose processors support instruction sets featuring several commonly used DSP operations. Most modern core designs have also been optimized for achieving single-cycle instruction execution performance.