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Analog IP supplier opens design shops in Edinburgh, Taipei

Scotland’s tech hub has a new tenant: Agile Analog, the IP supplier with the motto, “Analog IP the way you want it.” The Cambridge, England-based supplier of configurable analog IPs is opening a shop in Edinburgh to boost its design capabilities and reach more customers.

Earlier this year, Agile Analog set up its first regional sales and engineering support operation in Taipei, Taiwan. The aim of this move was two-fold: while the IP supplier wanted to better serve the IC design prospects in Asia, it also plans to intensify the collaboration with its foundry partners in the region.

Figure 1 Configurable analog IP is supplied to both tier 1 chipmakers as well as OEMs designing their own chips. Source: Agile Analog

Agile Analog’s building-block IPs serve power regulation, data conversion, security monitoring, and temperature and current sensing at advanced nodes below 10 nm. Here, as fabs and IC vendors refine their processes at these advanced nodes, the design rules are continually modified. That, in turn, invalidates the use of IPs created for earlier versions of the design rules.

It applies to both chipmakers’ own in-house libraries and conventional third-party IP suppliers. That makes it hard to support the advanced nodes like 10 nm; there is a time and cost penalty to reconfigure existing IPs in response to regular modifications of the design rules. To solve this design conundrum, Agile Analog has developed an automated process for generating configurable analog IP, which can be verified at every stage up to right-first-time tape-out.

According to Agile Analog engineering managers, the existing analog IP offerings require chip vendors and OEMs who are designing their own silicon to mold their chip design to fit a limited range of one-size-fits-all, standard analog IP products. On the other hand, Agile Analog claims that its COMPOSA technology allows them to reconfigure IP automatically and almost instantly (Figure 2).

Figure 2 The COMPOSA technology facilitates reconfigure IP automatically. Source: Agile Analog

So, by configuring analog IP the way chip vendors and OEMs want it, and on any process node, they can shorten development cycles, increase integration, improve die area utilization and enhance system performance. That’s how, says Pete Hutton, executive chairman of Agile Analog, his company is addressing the long-standing inefficiencies in creating and delivering analog circuits across process technologies.

Majeed Ahmad, editor-in-chief of EDN and Planet Analog, has covered the electronics design industry for more than two decades.

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