Applying High Speed De-Compensated VFAs: Hitting Performance Targets while Tuning Phase Margin, Insight #10

Most high-speed Voltage Feedback Amplifier (VFA) product developments have focused on the unity gain stable type, with far fewer offerings in decompensated VFAs. Those seem to come with more oscillation risk but can offer improved dynamic range vs. quiescent power. Here, some typical applications particularly suited to a decompensated VFA solutions will be shown with phase margin improvement techniques where needed. A sampling of vendor solutions across different process technologies will show the range of available high speed decompensated VFAs.

What is a de-compensated VFA and why would you use it?

Starting from a typical unity gain stable VFA, to get a decompensated version, IC designers would normally:

  • Increase the input stage transconductance – reducing the degeneration resistors – normally lowering the input spot noise voltage.
  • Decrease the dominant pole compensation capacitor just in front of the output stage buffer. With the same total supply current, this will normally increase the available slew rate along with increasing the Gain Bandwidth Product (GBP).

Using the same total quiescent current, a decompensated version will have a higher GBP, a higher slew rate, and lower input voltage noise. The initial intent for this type of device was simply to provide higher closed loop bandwidths when operated at higher gains. Using a few simple external design tricks, you can also use these to provide higher Loop Gain (LG) at lower frequencies – which is one path to lowering the harmonic distortion. Figure 1 shows the simplest higher gain application using the decompensated OPA838 bipolar device (Reference 1). This is using the Rf and Rg values from Table 1, Reference 1. Those values were developed solving for the Rf value that gives a total resistor noise power contribution at the output at 40% of the total and considering the added loop phase shift due the Rf || Rg driving the input pin parasitic capacitance. Lower R values would reduce the total output noise but then start to add meaningfully to the total power consumption over just the 1mA quiescent current for the OPA838. The Rs at the V+ input is added to achieve bias current cancellation for this bipolar input device. That Rs does increase the total output noise and should be replaced by a 10ohm value if DC precision is not a concern.

Figure 1

Click here for larger image Non-inverting gain of 10V/V using the decompensated OPA838 and recommended R values.


Non-inverting gain of 10V/V using the decompensated OPA838 and recommended R values.


Running a Loop Gain (LG) Phase Margin (PM) test in Figure 2 shows a LG=0dB at 28.5MHz with 64deg phase margin. This would suggest (Figure 4, Reference 2) a 1.56X28.5MHz = 44.5MHz F-3dB where the actual bandwidth shown in Figure 1 is 58MHz. While the LG = 0dB frequency closely matches the expected GBP of 300MHz divided by the Noise Gain (NG) of 10, quite a lot more closed loop bandwidth is delivered due to the PM<90deg effect. The added F-3dB extension (over Figure 4 Reference 2) is probably due to the > 2nd order Aol model and the reactive open loop output impedance in the model. The feedback LG measurement point in Figure 2 reports phase margin directly with the polarity shown and includes the internal input impedance model elements (Reference 3) along with the Rs element on the V+ input.

Figure 2

Click here for larger image Gain of +10V/V Loop Gain simulation for phase margin.


Gain of +10V/V Loop Gain simulation for phase margin.


Extending inverting operation to lower gains using decompensated VFAs

Moving beyond the simple non-inverting application at higher gains, if the application can use an inverting configuration, a simple external compensation can be used to operate at any inverting gain (including attenuation) applying a de-compensated VFA. Legacy literature (Page 14, Reference 4) also suggests a lead/lag compensation across the input pins (a series RC) to operate at low gains. This works, but does introduce a response zero impairing frequency response flatness and settling time. This simpler two capacitor inverting compensation approach (Reference 5) actually remains 2nd order with no zeroes providing an easily tuned closed loop response. The earlier illustrations using this technique matched theory very well with non-RR output stages having low open loop output impedance. More recent RR output stages with highly reactive open loop output impedances in their models still work, but do not match the simpler analysis in Reference 5 as well.

The general analysis of Reference 5 was later simplified to a closed loop Butterworth target as shown in equations 4 -> 7 in the OPA847 datasheet (Reference 6). The two capacitors in Figure 4 (using the newer OPA838 – Reference 1) are shaping the Noise Gain (NG) up with frequency to achieve a Loop Gain (LG) = 0dB crossover at a high enough NG to maintain stability for this de-compensated device. This does reduce the closed loop bandwidth but retains the full rated slew rate and a low input noise at frequencies below the NG zero frequency. The two key Noise Gains (NG) are the low frequency NG1 and then the higher frequency NG2 .

To solve for a nominally Butterworth closed loop response, use Equation 3 to get the Zo – this is physically the projection of rising portion of the NG in a Bode plot projected back to its 0dB intersection.

The actual NG zero frequency will occur at NG1 *Z0 .

With Z0 resolved, the required Cf will be given by Equation 4

And finally, the required Cs on the inverting node to ground is solved using Equation 5

For devices that do not have a highly reactive open loop output impedance, the resulting closed loop F-3dB bandwidth is approximately given by Equation 6

A graphical interpretation of what is going on with this inverting compensation is shown in Figure 3 (Figure 2, Reference 5). Here, only the dominant op amp Aol pole is shown. Any actual decompensated op amp will have higher frequency poles that will move the true Aol = 0dB crossover away from the ideal projected frequency. However, the LG = 0dB frequency is being pulled way back by the compensation to occur in a region easily modeled as only a dominant pole model.

Figure 3

Bode plot of op amp Aol and the NG for the inverting compensation approach.


Bode plot of op amp Aol and the NG for the inverting compensation approach.


To step through an example design, start by picking an Rf that is relatively low to hold its noise contribution down. Select:

a. Rf = 499Ω.

b. Set the target gain to = -2V/V – then Rg = 249Ω.

c. This gives us a low frequency NG1 = 3V/V.

d. Select a target high frequency NG2 > min stable gain of 7V/V at 10V/V.

e. Using the 300MHz GBP of the OPA838, use Equation 3 to get Z0 = 2.25MHz.

f. Then the Z1 in Figure 3 will be 3*2.25MHz = 6.75MHz. Below this frequency the LG is increased by the compensation to deliver lower harmonic distortion.

g. Using Z0 and Equation 4, set the feedback Cf = 14pF.

h. Then using Equation 5, set the capacitor to ground on the inverting input to 127pF, which is reduced by the internal 2pF Cdiff + Ccm , to Cs = 125pF.

i. The approximate closed loop bandwidth is estimated by Equation 6 to be 26MHz.

Figure 4 shows the resulting closed loop responses for different external conditions. Clearly, the two compensation capacitors are required to operate at this lower than minimum stable gain condition. The response shape with the compensation capacitors is peaking more than expected with extended bandwidth. Isolating the effect of the open loop output impedance by using a dependent source (Figure 7, Reference 2) shows a much better Butterworth fit with a 33MHz F 3dB nearly matching the expected 26MHz value.

Figure 4

Click here for larger image Gain of -2V/V inverting compensation using the OPA838.


Gain of -2V/V inverting compensation using the OPA838.


While the basic idea of this inverting compensation still works with the RR output OPA838, the added poles around the loop due to its reactive open loop output impedance move the resulting closed loop shape off the earlier theory. Decompensated wideband op amps with lower open loop output impedance using a non-RR output design (like the OPA818, Reference 7) will fit the expected shape much better. Figure 5 shows the Loop Gain (LG) simulation of Figure 4. The meter is rotated to report Phase Margin (PM) directly. This 21deg phase margin is much lower than the closed loop peaking in Figure 4 might suggest. Note the full input impedance model and the bias current cancellation resistor on the V+ input to ground are included here to develop the differential feedback voltage. This lower than expected PM, and lower peaking than expected for that PM in the response shape, are due to the OPA838’s reactive open loop output impedance model (Zol ). To move closer to theory in the next two examples, a non-RR output decomp JFET device (OPA818) with much lower Zol (Figure 5, Reference 7) will be used.

Figure 5

Click here for larger image Inverting Compensation LG simulation using the OPA838


Inverting Compensation LG simulation using the OPA838


Using a Decompensated VFA in a Multiple FeedBack (MFB) Active Filter

Another very common VFA application would be in an MFB (or Rauch) active filter. Legacy literature constrains these solutions to unity gain stable VFA devices since the direct feedback capacitor required by the topology shapes the NG to unity gain at higher frequencies. However, a direct extension of the inverting compensation technique described above will allow decompensated devices to be applied to MFB solutions (Reference 8). Expanding the solution universe to decompensated devices will allow much higher slew rate devices giving higher full power bandwidth and lower harmonic distortion. Use the 2.8GHz Gain Bandwidth Product (GBP) OPA818 to implement a 2nd order MFB design delivering:

  1. Inverting gain of -5V/V
  2. 5MHz F-3dB
  3. Butterworth response (Q=0.707)

The RC solution of Figure 6 is using a reduced noise and NG peaking flow (Reference 8) to get the filter RC values. The required added step is to target a higher frequency noise gain using the filter feedback C2 and an added Ct to ground on the inverting summing junction. Targeting a capacitor divider NG of 10V/V for this minimum stable gain of 7V/V device gave the added 120pF to ground on the op amp’s inverting node in Figure 6. This Ct capacitor can be included in the 3rd order transfer function coefficient polynomials for a GBP adjusted RC solution without increasing beyond 3rd order (Reference 9). Adding Ct will effectively reduce the available GBP by that higher frequency NG value – in this case reducing the available GBP to 280MHz for the MFB RC solutions. Some legacy MFB solution flows show a very high required GBP for this design point (1.77GHz from the TI active filter designer, Reference 10). However, accounting for the equivalent GBP in this design gave the reasonably accurate solution of Figure 6. These RC values are both adjusted for GBP (including the effect of Ct ) and selected for the best fit E96 resistor and E24 capacitor values.

Figure 6

Click here for larger image Inverting MFB design using the de-compensated OPA818.


Inverting MFB design using the de-compensated OPA818.


Another important indicator of both active filter design margin and stability come from the LG simulation of Figure 7. This is showing a very good 31dB of LG at the filter Fo = 5MHz. Then, at the LG=0dB frequency of 235MHz we also see a very good 55degrees phase margin. Removing that Ct capacitor moves the LG=0dB crossover out to 956MHz with only 15degrees phase margin.

Figure 7

Click here for larger image MFB filter LG simulation with Ct NG shaping capacitor.


MFB filter LG simulation with Ct NG shaping capacitor.


This application of a decompensated VFA is of course peaking the output noise to get stability. Figure 8 shows the output spot noise with and without Ct in the design. The stable design will have an increased integrated noise to get that stability. The first peak in the output noise is the filter noise gain peak while the 2nd is the LG=0dB crossover peak. A post RC filter can be used to reduce this higher integrated noise. Removing Ct definitely reduces the output spot noise but that sharp peak around 1GHz is typical of very low phase margin designs.

Figure 8

Click here for larger image Output spot noise with and without Ct in the MFB filter design.


Output spot noise with and without Ct in the MFB filter design.


Essentially extending the inverting compensation approach to this active filter design easily allows decompensated VFAs to be applied to these MFB filter requirements. This can vastly extend the available full power bandwidth using the intrinsically higher slew rates available from decompensated devices. If possible, the full design flow should consider a simple post RC filter to reduce the more peaked output spot noise intrinsic to this approach. It does not appear at this time that any of the vendor online MFB design tools will apply a decompensated VFA to solutions. To force a solution, use a unity gain stable device, to be later replaced by a decompensated device with this added Ct targeting a high frequency noise gain to be developed later, and divide that into the decompensated GBP to get the equivalent unity gain device GBP to target. Execute a design with a device near that target using a unity gain stable device, then replace it with the decompensated device with the added Ct element.

Applying Decompensated VFAs to Photodiode Transimpedance Applications

Probably the most ubiquitous application of decompensated VFAs comes in the transimpedance application. The simplest form of this is just the detector capacitance, a feedback resistor that sets the gain, and (most importantly) a feedback capacitor that sets the Q of the closed loop response. The Bode plot for the loop gain is very similar to Figure 3 except the DC NG is 0dB (see Figure 2, Reference 11). One common assumption is that the feedback Cf will eventually be chosen to deliver a closed loop maximally flat Butterworth response. With that assumption, Equation 7 (Equation 12, Reference 11) gives the required GBP dependent on the other terms in the design. Increasing the desired gain (Rf ), bandwidth, and source Cs all act to increase the required GBP in the VFA to deliver a closed loop 2nd order maximally flat Butterworth response shape.

The next key is to decide if a bipolar input or JFET input device is preferable. That normally becomes an input referred equivalent spot current noise question. The simplified expression in Equation 8 (Equation 13, Reference 11) applies when there is a postfilter at a frequency less than the feedback pole frequency. Making that assumption allows a simpler integration of the rising portion of the spot output noise due to the noise gain zero formed by the feedback resistor and source capacitance (Cs ). Equation 8 is delivering the equivalent flat input current spot noise that will integrate to the same total output noise power as the highly peaked actual output noise response.

What this means in practice is the target F-3dB in the transimpedance stage should be slightly higher than desired. This is a good practice in any case to account for GBP variation in the op amp stage where an extrinsic postfilter will deliver a lower tolerance operating bandwidth and constrain the integrated noise.

The FNPBW is the Noise Power BandWidth (NPBW) in Hertz of the postfilter which needs to be less than the feedback pole frequency for Equation 8 to be accurate. It is often difficult to predict which decompensated VFA will give the lowest input referred current noise as different combinations of terms in Equation 8 can be dominant depending on source capacitance, the NPBW, the gain, and the op amp noise terms. This often it comes down to trying different physical op amp terms in Equation 8. Normally, for transimpedance gains > 100kΩ, a JFET or CMOS input device will be preferable.

Equation 7 can be used in a couple of ways to set the limits for a transimpedance design. Since increasing the feedback Rf uniformly reduces the input referred current noise as shown by Equation 8, one common approach is to solve Equation 7 for the maximum Rf to satisfy the target F-3dB with the source capacitance and available GBP in a candidate device as shown in Equation 9.

Once we have this maximum gain to meet the intended bandwidth target, the last step is to solve for the required feedback Cf to hit that. Equation 10 shows an approximate solution that works very well where the Q relates to the desired or allowed frequency response peaking in the transimpedance stage.

Continuing with the OPA818 2.8GHz GBP JFET input device, target a final F-3dB using a 2nd order passive Butterworth postfilter to 10MHz while targeting the transimpedance stage at 14MHz. Assume a 20pF diode capacitance and add the internal Ccm = 1.9pf + Cdiff = 0.5pF. Putting these numbers into Equation 9 yields:

Rfmax = 102kΩ

And then solving for the required Cf to hit a Q=0.707 using Equation 10 yields:

Cf = 0.16pF

Putting this into a TINA (Reference 12) simulation, along with an 11MHz 2nd order Butterworth RLC filter with only -1dB insertion loss (Reference 13), gives the design of Figure 9. Here, the response to the OPA818 output pin matches the 14MHz Butterworth target while combined with the 11MHz passive postfilter gives a nearly perfect 10MHz F-3dB to the output.

Figure 9

Click here for larger image Transimpedance design with 2nd order passive postfilter


Transimpedance design with 2nd order passive postfilter


The input referred current noise is a low 0.4pA/√Hz through most of the span rising to 3.3pA/√Hz at 10MHz due to increasing NG for the input voltage noise and the filter rolloff. Evaluating Equation 8 using a NPBW = 11MHz*1.11 = 12.2MHz (the F-3dB to NPBW adjustment for a 2nd order Butterworth filter) gives an ieq = 2.2pA/√Hz

Figure 10

Click here for larger image Input referred spot noise current referenced to filter output.


Input referred spot noise current referenced to filter output.


This design flow was simplified by assuming a closed loop Butterworth design target. Testing the LG phase margin in Figure 11 showed very nearly an exact (65.5deg) Butterworth phase margin.

Figure 11

Click here for larger image Transimpedance design Loop Gain phase margin


Transimpedance design Loop Gain phase margin


The nearly 180deg phase shift around the loop at lower frequencies is normal for transimpedance design as the NG zero (70kHz in this example) starts rising at lower frequencies. That loop phase is pulled back up to 65.2deg phase margin at LG = 0dB crossover by the feedback pole. The high frequency noise gain is approximately 1+(22.4pf/0.16pF) = 235V/V. Such a high noise gain at higher frequencies shows why the higher order poles of a decompensated VFA can normally be ignored and only the true single pole GBP is required for the design.

Representative Decompensated VFA devices

The following 3 tables list a range of wideband decompensated voltage feedback amplifier solutions. Breaking these into technology segments as CMOS, JFET, and Bipolar inputs. The Bipolar will have the lowest input noise voltage’s while the CMOS and JFET will have the lowest input noise current. Also, for the devices listed, an effort was made to extract the true single pole Gain Bandwidth Product to list in descending order. In some case that was a TINA simulation of the most current (circa June 2019) model where any capacitive load was removed for the Aol simulation if noted in the specifications. That simulation result took precedence over other reported numbers or datasheet plots. In all cases, these are limited to:

a. Single channel devices

b. If both disable and non-disable versions, the disable version is shown.

c. Not obsolete

Note that in many cases the reported Small Signal Bandwidth at Gmin times that Gmin value does not equal the true GBP.

Table 1


Decompensated CMOS Voltage Feedback Amplifiers.


This JFET table has the same screens as the CMOS table. Many more offerings here with much higher speed options over the CMOS devices. While the CMOS devices are usually CMOS implementations through the entire device, these are JFET “input” only with usually bipolar devices used everywhere else.

Table 2


Decompensated JFET Input voltage Feedback Amplifiers.


The Bipolar devices have many more (and much older) alternatives. In order to eliminate devices perhaps not too interesting for new design, this table was also screened to only include:

  1. Input offset voltage <=3.0mV
  2. Input voltage noise <3nV/√Hz

These are where the lowest input voltage noise and highest bandwidth devices will be found, but with much higher input bias currents and current noise terms.

Table 3


Decompensated Bipolar voltage feedback amplifiers.


The decompensated VFA finds wide application in simple higher gain applications where its intrinsically lower input voltage noise and higher slew rates are very useful. It is also very commonly used in transimpedance applications where their very high GBP expands the performance universe and the high NG at LG=0dB crossover renders a unity gain stability requirement unnecessary. Using the inverting compensation approach expands the application space to lower inverting gains and MFB filter applications. Next up – are inverting attenuators a stability risk and why might you use them?

References for Decompensated VFAs

  1. TI OPA838 op amp, “1-mA, 300MHz, Voltage Feedback op amp
  2. Planet Analog article, Michael Steffes, Feb. 3, 2019, “Stability Issues for High Speed Amplifiers: Introductory Background and Improved Analysis, Insight #5
  3. Planet Analog article, Michael Steffes, June 7, 2019, “Input Impedance Extraction and Application for High Speed Amplifiers, Insight #9
  4. TI LMV793, (same as the LMP7717), “88MHz, Low Noise, CMOS Input, Decompensated Operational Amplifiers
  5. EDN article, Michael Steffes, Feb. 27, 2019, “Unique compensation technique tames high bandwidth voltage feedback op amps
  6. TI OPA847 op amp, “Wideband, Ultra-Low Noise, Voltage Feedback Op Amp with Shutdown
  7. TI OPA818 op amp, “2.7GHz, 13V, decompensated 7V/V, FET input Op Amp
  8. TI application note, , Michael Steffes, Feb. 2006, “Design Methodology for MFB Filters in ADC Interface Applications
  9. Planet Analog article, Michael Steffes, Feb. 8, 2018, “Include the op amp gain bandwidth product in the Rauch low pass active filter performance equations
  10. TI Active Filter Designer, entry page for filter type selection
  11. TI application note, Xavier Ramus, Nov. 2009, “Transimpedance Considerations for High Speed Amplifiers
  12. TINA simulator available from DesignSoft for <$350 for the Basic Plus edition. Includes a wide range of vendor op amps and is the standard platform for TI op amp models.
  13. TI application note, Michael Steffes, Dec. 2003, “RLC Filter Design for ADC Interface Applications

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