There is an occasional caution that even unity-gain stable Voltage Feedback Amplifiers (VFAs) risk instability in inverting attenuator applications (Reference 1). In fact, there should be no more instability risk there than operating non-inverting gain of 1 as long as no other added poles around the loop introduce adequate phase shift to move into instability. Example inverting attenuator designs with both unity gain, and decompensated, VFAs will be shown with paths to degrade, then improve, the phase margin. Then, assuming an inverting attenuation stage is safe stability wise, you can use these in some cases to incrementally improve the SNR for a two-stage amplifier design.

**Inverting Attenuators using VFA – Noise Gain (NG) and Loop Gain (LG) Considerations.**

Any stability concern in an op amp application essentially comes down to assessing the phase margin at LG = 0dB crossover (Reference 2). In the classic Bode analysis, this is looking at the open loop gain and phase for the core amplifier (A_{ol} ) then laying the NG on top of the magnitude plot and subtracting its phase from the A_{ol} phase. Where the NG crosses over the A_{ol} magnitude (LG = 0dB), the total phase around the loop needs to have adequate margin to -180deg to insure stability. The NG is then the key element determined by the external configuration. That NG is simply the inverse of the transfer function from the op amp’s output pin to the differential input voltage. With V+ grounded in an inverting configuration, Equation 1 shows that simple divider for the simple attenuator of Figure 1 (the examples here are using non-Rail-to-Rail output stage devices to keep a simpler open loop output impedance).

Then, inverting Equation 1 will give the NG of Equation 2.

In the LG analysis, the voltage source input is grounded. The example of Figure 1 has a DC noise gain of 1.25V/V. So, if the op amp itself is unity gain stable, inverting attenuators should be stable as well (Section 18, Reference 3). The two sources of confusion in Reference 1 are:

- Assuming the NG is the same as the signal gain (Rf/Rg) neglecting the 1+ part of the correct NG.
- It is easy to reduce phase margin in an inverting attenuator using higher Rf values, and/or with faster op amps, where an added loop pole is created with the op amps’ parasitic input capacitance.

Figure 1 does show about 3.5dB peaking in the closed loop response suggesting a phase margin of 42deg (Figure 2, Reference 2). Here, since the TINA (Reference 4) model for the OPA890 (Reference 5) did not include the specified input capacitance (check that using Reference 6), that 1.5pF was added externally causing the simulated peaking.

This lower phase margin is not due to the DC noise gain being too low for this device, but instead the feedback pole caused by C_{p} . This effect is usually easy to fix for a design using a unity gain stable op amps using a feedback capacitor and the pole/zero cancellation idea setting 1/(R_{g} C_{p} ) = 1/(R_{f} C_{f} ). This is identical to the scope probe flatness adjustment idea (section 13, Reference 3). Adding a feedback capacitor equal to 4*C_{p} gives the flat response of Figure 2. This very flat response is bandlimited to 36MHz by the feedback pole in the signal path but clearly also has much higher phase margin over the simple starting point of Figure 1. If higher bandwidth is required, simply scale the R_{g} and R_{f} resistors down in the same ratio.

**Figure 2**

**Inverting attenuator with compensation capacitor across the feedback R _{f} **

Setting up a LG phase margin simulation for Figure 1 (Reference 2) showed a LG = 0dB frequency at 81MHz with 41degrees phase margin. Repeating that with the C_{f} = 6pF added in Figure 2 increased the LG = 0dB frequency to 88MHz with 64degrees phase margin.

**Delivering an Inverting Attenuator with Different Types of High-Speed Amplifiers.**

While the most commonly applied amplifiers are unity gain stable VFA types, an inverting attenuation will always be stable applying either a Current Feedback Amplifier (CFA) or a CFA based Fully Differential Amplifier (FDA) if the feedback resistor values are set near the recommended value(s). If the resulting frequency response is peaking, either increase the R_{f} values slightly or check for load capacitance induced instability or inverting summing junction excess parasitic capacitance (Reference 7).

If a decompensated VFA needs to be applied to an inverting attenuator application, that is easily accomplished using the same two capacitors in Figure 2 with the values arrived at differently. Without those capacitors, using a decompensated VFA for an inverting attenuator certainly risks instability as the DC NG will be between 1 and 2V/V usually less than the minimum recommended gain for those amplifier types. Figure 3 shows a starting design without the noise gain shaping capacitors using the minimum recommended gain of 3V/V OPA843 (Reference 8) set up for a gain of -0.25V/V or a NG = 1.25.

This low 1.25V/V NG is indeed showing about 14dB peaking in the closed loop response corresponding to an unacceptably low 11degrees Phase Margin (PM) (Figure 2, Reference 2). To improve the PM:

- Target a high frequency noise gain that will be set by the capacitive1+C
_{s}/ C_{f}noise gain (Figure 2, Reference 9) higher than the minimum recommended noise gain – use 5V/V here. - Estimate at what frequency that higher frequency noise gain will intersect the op amp’s open loop gain curve by dividing it into the true Gain Bandwidth Product. That is 800MHz (Table 3, Reference 10) for the OPA843 giving a 160MHz intersection frequency.
- Set the feedback pole (1/R
_{f}C_{f}) at ½ that intersection frequency to ensure the NG has flattened off at intersection. That would be 80MHz here solving to C_{f}= 8pF. - With C
_{f}resolved, set the inverting node capacitor to ground the target high frequency NG-1 times that value – then reduce that by the internal parasitic value (2.2pF for the OPA843). This gives the C_{s}= 30pF shown in Figure 4.

The modified circuit of Figure 4 clearly shows how effective this is giving a very flat attenuating response with 170Mhz F-3dB. This far exceeds the feedback pole due to the LG bandwidth extension common with phase margins less than 60deg.

Testing the LG phase margin of Figure 4 in Figure 5 showed a LG = 0dB crossover at 143MHz with only 36degrees phase margin. The sense meter is rotated to report phase margin directly. This low phase margin is extending the bandwidth and would be peaking but the signal path pole at 80MHz is apparently compensating that to give a flat response.

To increase the phase margin for this example, target a feedback pole at a lower frequency than the 80MHz used here then continue on to set the C_{s} values using the desired high frequency NG.

**Using an Attenuating Amplifier Stage to Improve Signal to Noise Ratio (SNR)**

In two stage ADC driver applications it is sometimes possible to incrementally improve the SNR by modifying the design from two gain of 1 stages to a higher input stage gain followed by an attenuator stage driving the ADC. This is essentially setting the SNR at the interstage point with a much higher signal level swing then attenuating both signal and noise in the 2^{nd} stage together with little added SNR degradation. Figure 6 shows the original buffer + gain of 1 FDA stage from a recent 18bit SAR driver reference design (Reference 11).

**Figure 6**

**Original signal channel design using an OPA827 buffer and THS4551 single to differential stage.**

Running an SNR simulation using the full scale 8Vp-p at the ADC (2.83Vrms for the TINA sim) out to 10MHz gives 102.6dB SNR. This is only slightly higher than the 100dB specification for the 18bit, 2MSPS, ADS9110 (Reference 12) partially explaining the degradation reported in the reference design to 96.6dB SNR.

Since the input buffer stage uses +/-18V supplies, an easy modification would be to increase the gain to +4V/V there, producing a +/-16V output, then modify the THS4551 FDA stage to a divide by 4 attenuation. The FDA design already included elements to shape the noise gain up at higher frequencies improving phase margin. That simple modification is shown in Figure 7.

Rerunning the same SNR simulation gave a slight improvement to 103.4dB as shown in Figure 8.

This modest 0.8dB improvement in amplifier SNR will incrementally improve the combined result. This does move in the direction of reducing the distortion performance of the input stage. However, where SNR is paramount, this simple gain followed by an attenuation should be considered when the first stage swings are within the range of the supplies and device used. Two more modifications are even more effective from the starting design:

- Reduce the input resistor in that RC stage to reduce its input noise contribution
- Reduce the bandwidth in the final RC by increasing the series resistors to 20ohm from 10ohm each.

Those changes give the circuit Figure 9 which now simulates to an SNR = 105dB still including the gain of 4 input stage followed by and attenuating FDA stage – a considerable improvement from the original 102.6dB.

Unity gain stable VFAs can always be used as simple inverting attenuators – sometimes requiring a compensation capacitor across the feedback to balance the feedback pole to the inverting input parasitic capacitance. With minimal effort, even a decompensated VFA can be applied as an inverting attenuator using the two capacitor noise gain shaping approach. Where a design needs to squeeze that last bit of SNR out of the signal channel, consider generating a higher swing than needed by the ADC in the first stage, followed by and attenuating last stage. Next up, why is Gain Bandwidth Product so confusing and cutting through that confusion – then once understood, how do we use this to set the required GBP margin in active filter designs?

**References for Inverting Attenuators**

- Some warnings in the literature that inverting attenuators risk instability:
- Section 2.2, TI application note SLOA058, “A Single Supply Op-Amp Circuit Collection”, Bruce Carter, Nov. 2000
- Section 13.1, “Op Amps for Everyone” 4th Edition, Bruce Carter

- Stability Issues for High Speed Amplifiers: Introductory Background and Improved Analysis, Insight #5
- TI Application note, “The Signal, a Compendium of Blog Posts on Op Amp Design Topics”, Bruce Trump, 1Q, 2017
- TINA simulator available from DesignSoft for <$350 for the Basic Plus edition. Includes a wide range of vendor op amps and is the standard platform for TI op amp models.
- “ TI OPA890: Low Power, Wideband Voltage Feedback Op Amp with Disable”
- Input Impedance Extraction and Application for High Speed Amplifiers, Insight #9
- Stability Issues and Resolutions for High Speed Current Feedback Op Amps, Insight #7
- TI “OPA843: Wideband, Low Distortion, Medium Gain Voltage Feedback Operational Amplifier”
- EDN article “Unique compensation technique tames high bandwidth voltage feedback op amps”, Michael Steffes, Feb. 27, 2019
- Applying High Speed De-Compensated VFAs: Hitting Performance Targets while Tuning Phase Margin, Insight #10
- TI reference design “ADC Voltage Reference Buffer Optimization Reference Design for High-Performance DAQ Systems”, TIDA-01055, Jan.29, 2018
- TI ADS9110, “18-bit, 2MSPS, 15mW, SAR ADC”

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