ASICs vs. Semi-Discrete Design

Application-specific ICs (ASICs) have the benefit of integrating a maximum amount of circuitry for a particular function on a single IC. This saves board space and cost. However, ASICs also have disadvantages for low- to medium-volume products that should be remembered when making design decisions among integration alternatives.

With obvious size and cost benefits, ASICs seem to be the way to go if the function you need has already been integrated. System-level design then becomes a simplified task of following the “typical circuit” in the data sheet application examples, making minor adjustments for system specs, and voila! Board-level design is trivialized and the best designers will eventually all work for semiconductor companies.

This scenario is fictional or at least highly idealized. A just-right ASIC can be adjusted parametrically to the application while maintaining space and cost advantages. Yet the goal of commercial ASIC design is to make it as general as possible in its specificity. If the ASIC is optimized for one particular design, it is a custom IC, of lesser use for other applications. If it is too general, it is likely to be suboptimal for any particular application.

In reducing package size and cost by reducing pin count, ASICs also reduce observability. In practice, a functionally-rich ASIC will lure the unwary designer to adapt it to a different application than was intended. For instance, most power-factor controller (PFC) ASICs are based on a boost (common-active) converter topology. But what if you want to use a SEPIC instead? It has the advantage of eliminating power-on inrush current, and the current-limit thermistor — a somewhat large and expensive part.

Suppose you try to adapt a boost-converter ASIC to a SEPIC topology. What happens? First, the incremental (small-signal) transfer function is different. Consequently, the ranges of voltages and currents are different, as are parts values that are found in control loops. These value changes affect loop behavior, including stability. Additionally, ASIC control loops depend on a certain polarity of phase input at their feedback pins. Inversion requires additional circuitry. More subtle difficulties involve layout effects because your circuit is different.

Another problem with ASICs is that many come and go. Because they are specific , they tend to have a short market life. While I was designing a PFC (power factor correction) circuit years ago, I chose to use a Unitrode UCC3858. While I was making progress on the design, TI acquired Unitrode and cancelled the part. Perhaps it was a good marketing decision for TI but not for my project. If I had used well-established, multiple-sourced ICs, I would have avoided this problem, but no legacy ICs for PFC were available.

A semi-discrete design uses more components and board space than an ASIC but is based on the principle of using only well-established parts that are multiple-sourced in high volume, are consequently low in price, and continue to be available. In the PFC case, examples are the UC3843 PWM current controller, commodity op-amps and comparators, and a legacy part such as the CA3080 for the PFC multiplier. These parts are produced in high volume and have reached commodity price levels. The sum of their costs can be less than an ASIC for lower-volume designs.

The disadvantage of additional board space is offset by more accessible nodes to probe in test, thus reduced production test cost. For design, such access is obviously desirable. For long product lifetimes, part obsolescence problems are minimized or avoided. Furthermore, semi-discrete designs become an “elastic” technology base from which larger adaptations can be made, saving redesign costs and reducing time-to-break even.

On the other hand, for high-volume designs, the tradeoffs are just the opposite. Few if any of the benefits of semi-discrete design apply. High-volume purchase of an ASIC over the product lifetime will sustain the interest of the supplier. The lack of circuit observability is overcome with accurate simulation and automated testing. It is the supplier's responsibility to insure that the IC meets its specifications. ASIC integration has the expected benefits.

Sometimes design trends should not be taken for granted. They are not always best to follow for every project. While integration is generally a good trend, it can also produce undesirable side-effects for lower-volume products. Happily, all major semiconductor suppliers support parts suitable for semi-discrete design. In considering ASICs, it is sometimes best for low-volume designs to use only those that have proven their ability to endure.

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12 comments on “ASICs vs. Semi-Discrete Design

  1. Scott Elder
    July 2, 2013

    Hi Dennis – At what point does it make sense to simply use a higher level subsystem (i.e. LTC micro module) rather than worry about what level IC one should use (i.e. standard, ASSP, custom)?  It seems that once ones volume drops to a small amount, perhaps it makes more sense to simply be an aggregator.

    LTC makes micro modules for power and RF for example.  I'm sure they aren't cheap, but then neither are engineers sitting around thinking about the 20 odd components inside that would need to be sourced from 3 different vendors.  It seems to me that one stop shopping from a quality company has lots of value also.


  2. CarlWH
    July 3, 2013

    Hi Scott,

    Unfortunately there is no definitive point where this happens. Each design has to be assessed on its merits.

    I do think we need to be clear on the definition of an ASIC. For me this is a custom part designed for one customer. It is not for general sale, this type of device I would call an ASSP.

    So for an ASIC, you do your calculations and assess the business case, and arrive at your preferred architecture. The volume is only part of the assessment. For instance, take a design that has to meet a stringent standard, e.g. aerospace designs. To change a component in these is an absolute nightmare to re-qualify. Also the volumes are not massive and the product may have to be supported for many years (20 plus). So an ASIC allows you to do this, the part will not get made obsolete, so you would go down this path even for a handful of products per year. The ASIC approach gives you control over your supply chain. The only reason the ASIC will go obsolete is the fab withdrawing the process, and this can be planned for with process transfers and/or last time buys, (wafers can be stored in dry nitrogen for twenty years or more)

    Obsolescence is important to many designers and ASICs can offer protection.

    These are some of the reason people chose the ASIC path

    1.     Performance requirements

    2.     Cost reduction

    3.     Size

    4.     Obsolescence

    5.     Quality

    6.     IP protection

    It will usually be a combination of these factors that decide.

    I hope this helps on a complex subject


  3. Davidled
    July 3, 2013

    It might be a differnet topics as adding to FPGA, but both of FPGA and ASIC has a integrated circuit. In my view, depending on project condition, either FPGA/ASIC, discrete semi-discrete component or combination might be carefully evaluated, as reviewing the design time and cost with man power and validtion cost.

  4. RedDerek
    July 3, 2013

    When I was an apps engineer, there were a few customers that we created ASICs for. They paid nicely from what I heard. However, the focus of an app engineer working with a customer for a new product is to figure out what other applications the chip can be used for; at least in my opinion. This way more than one customer would be able to use the product. My last few semiconductor ideas were such that a design could be done once, and then, between a combination of packaging, bond wiring, and metal masking, many other products could be spun out. This is the best approach in my view – one design, multiple products.

  5. Scott Elder
    July 3, 2013

    Thanks for your response.  If we limit the discussion to low volume ASICs–since high volume is by all measures essentially a standard product–I'm not sure the list is that long.

    For example,

    (1) Performance requirements – There is a lot of tough R&D done inside companies like ADI, LLTC, etc. to produce the absolute best performance parts available.  I would doubt they do this and then limit the sales to a proprietary 1000 unit/mo socket.  I think rather it is the other way around.  Highest performance and a company's best talent is found working on parts with the highest return on NRE.  Its not unreasonable to spend millions developing the next generation, best in class ADC, for example.  

    (2) Cost reduction – I think it will always cost more at low volume to do an ASIC because the NRE ends up factoring into the total money spent over the life of the program.

    (5) Quality – I think a part that sees 1 Million units per month volume experiences substantially more critical quality evaluation than a part that is made 1000 units per month.  By critical I don't mean necessarily the limits of a test, but rather the confidence level in the socket.  Low volume quality is based upon mathematical extrapolation.  High volume quality is based upon actually making multiple six-sigma size lots every month thereby generating real data to study.

    But, the other three…

    3.     Size

    4.     Obsolescence

    6.     IP protection

    I can see where these would make sense.


  6. Bob F.
    July 4, 2013

    My 2 cents:


    I agree with most of the commentary on this thread. That said, I think that quality is not a strong motivator for ASIC development. Scott's comment implies, although I hope I'm misinterpreting it, that a low volume ASIC will have inherently lower quality that a high volume standard product and that is just not the case.

    Quality is conformance to a spec.  ASICs are run on the same processes or combinations of processes, as high volume standard products. They are designed with the same tools (Cadence, Synopsys, Spice). Fabs produce 10s and 100s of thousands of wafers on these processes. Unlike the 'old days' when wafer fab involved some 'black magic' to get it right, today's fabs have it nailed. A low volume ASIC wafer's quality (the manufacturing aspect of the wafer and this includes the design rules established by the fab upon which the design is engineered) is no different that of a high volume standard product.

    So let's consider the design. Scott, you state that big companies, like LTC, ADI wouldn't put their 'best talent' on a low volume / low return on investment part. While this may be true, the implication is that lesser talent is what is available for lower volume applications. While I cannot speak for all Analog ASIC companies, I can speak for JVD, and that too is just not the case.  JVD has been in business for 31 years and while this may be hard to believe, the company has never had a single quality return…not one!

    Referring to CarlWH's original comment, I think rather that number 5. 'Quality', that customers consider ASIC's for Reliability. Reducing component count, board simplification, etc. can offer a measurable improvement in reliability. It's rarely a chip that fails these days…it's things like solder joints.

  7. Scott Elder
    July 4, 2013

    Hi Bob,

     I have to disagree with you on the issue of quality in low volume analog.  Simply because an analog design is manufactured on a high volume wafer line using high volume packaging and common design tools/models does not allow one to ignore the quality impact of a new circuit design.  If we were discussing digital design, I might agree.  In digital, human involvement is becoming less and less each year.  But in analog, the imperfect human contribution is all over the place.  Here are two examples of how a 100% qualified manufacturing flow can result in a lower quality analog IC.

     MOSFET current mirrors are found everywhere in an analog IC design.  And MOSFETs wear out as a function of the Vds and Vgs bias conditions as a result of hot carrier injection slowly destroying the drain-gate interface.  I don't think MOSFET models even capture this well-known nuance because no one would simulate a circuit for the time it would take to see a failure.  But I have seen several designs over my career where the designed Vds is too high and the device eventually fails.  The rate of failure is different for different wafer lots–it can be from minutes to years.

     In a similar vein, and using the current mirror example again, one could route the current through a metal line that is too narrow or has too few contacts/vias for the designed current.  Here we can have an electro migration quality failure introduced during the design phase.  And the failure rate will be a strong function of what was produced on the failed wafer lot (i.e. metal thickness for parts from the qualification lot was thicker than a later production lot).

     From my perspective, the more data one produces on a part, the higher the confidence level is for that part.  This is why many analog standard parts enjoy long lifetimes.  All of the bugs have been worked out over many hundreds of millions of installed and operating units in all types of environments.

     When analog design becomes fully automated without much human involvement, then I would be open to the suggestion that making something 1000 times is just as high quality as making something 10 Million times.  We are almost there with digital, but analog still has a way to go before the human factor is removed.



  8. goafrit2
    July 4, 2013

    >>   It seems that once ones volume drops to a small amount, perhaps it makes more sense to simply be an aggregator.

    In my office, our barometer is any order that is less than one million units, never consider a full ASIC. In this business, you need volume to make money in ASIC because it is very complex, expensive and difficult than the alternatives. 

  9. Scott Elder
    July 5, 2013

    Carl, I think another reason to consider an ASIC would be Liability.  This would apply for medical ASICs primarily.  So, Size-Liability-IP-Obsolescense.   

  10. Brad Albing
    July 7, 2013

    Uh-oh – now we're getting the lawyers involved. With a lot of ICs, we often see the disclaimer stating that the manufacturer is not responsible for your screw-ups; so when you hurt someone, [they say] it's not their problem.

  11. Bob F.
    July 10, 2013

          Hi Scott.

    We may be getting off topic here… the subject is ASIC vs “Semi-discrete design”


    Your comment, ” the imperfect human contribution is all over the place.” is true whether the design is an Analog ASIC or a standard analog IC. There is lots of human involvement in both compared to digital.


    Similarly you said “one could route the current through a metal line that is too narrow or has too few contacts/vias for the designed current. Here we can have an electro migration quality failure introduced during the design phase.”  I fail to see how this applies to analog ASICs more than a standard analog product.  Looks like you are describing either a failure to adhere to design rules or improper processing in the fab…. Neither of which is more or less prevalent in analog ASICs.

    “When analog design becomes fully automated without much human involvement, then I would be open to the suggestion that making something 1000 times is just as high quality as making something 10 Million times.” 


    WOW! If this were to be true then heaven help those customers who have the nerve to design in any new analog IC…because the implication here is that the quality will be risky until the supplier makes 10 million units.

  12. CarlWH
    July 15, 2013


    Sorry for the delay in answering but I have been out of office.

    Scott, I understand the points you are making and you are correct in the companies like ADI will be involved in R&D for their products. However, these are standard parts, not in my view ASIC's. That said, companies like ADI, will design an ASIC for you, and they will have their business model, (like any company does), and if your design does not fit into this it will not happen with them. As standard parts are there to gain maximum volume, they will not always be optimum performance for your application, indeed many may be over specified for a design, hence the need for an ASIC.

    Please do not get me wrong there are many designs where an ASIC does not make any sense what so ever, my point was you cannot generalise about when this is. We have done designs for less than 100 parts, as well as designs for millions.

    My point about quality, was not just the quality of the device, (this is key to many markets irrespective of volume and there are many techniques used in testing devices, and the models available from the fabs nowadays are excellent), but it was about the subsystem it goes into. Let's consider medical, as it was mentioned, qualifying a medical product can (and does) take years. Any re-qualification, say due to a part change, is a big problem. So you have to decide how you mitigate this risk.

    Cost is always the big question, and we have seen it is possible to get cost reductions for designs of what would be considered low volume. My point was it is relatively easy to determine if it is cost effective and should not be discounted as an option just because the volumes are “low”. I have not defined low on purpose, as I do not think there is an absolute number for it.

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