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Ask the Experts Q&A: Transistors

Q1: When should a design engineer care to account for secondary breakdown?

HS Answer1: Breakdown voltage in a bipolar transistor can be rather complicated. There are several factors that determine the maximum voltage across a given junction. Generally, these include avalanche multiplication, thermal instability, and tunneling. However, as a circuit designer and not a transistor designer, these should not be your direct concern.

Q2: How does a design engineer pick the right value of Hfe for his (paper-n-pencil) design calculation?

HS Answer2: Hfe (or beta) is a characteristic of a given transistor. The only way you can choose Hfe is to select the right transistor — you cannot change the Hfe. The specifications for a given transistor are found on their individual data sheets. First, you will need to determine what characteristics you need (Hfe, Max Ic, Max Vce, Power, etc.). Consider that, in most cases, Hfe is a function of Ic and decreases with increasing Ic. Once you know the requirements of your transistor, you can start the hunt for the best available device. Again, the “right” Hfe is found in the data sheets, but you must be careful to use the Hfe that corresponds to your operating point.

Q3: Hfe of a transistor used in power applications are typically low. Why?

HS Answer3: The answer is process dependent (what technology is used to make the transistor). Generally, power transistors are required to have higher breakdown voltage than small signal devices. When fabricating devices to operate at higher voltages, it is necessary to make the base-width larger. Base-width significantly affects Hfe (beta).

Q4: I'm from the PCB world, but for the last 8 years I've been at an IC design company. Any suggestions on what I need to know to better interact with the chip designers? Besides going back to school and getting a PhD in chip design — with a family to support, that's not going to happen.

Answer4: I suggest that going back to school that has a very strong program in the level of chip design, or has a thesis program that allows student to experience chip design.

ST Answer: As a first step, try to use some simulation programs for chip designers.

Q 4-1: OK, I've tried simulation, but it doesn't agree with me! I identify more with the late Bob Peases and Jim Williamses of the world. Design it, build it, test it, learn from it, that's more my style. Sigh, I guess there will always be an impedance mismatch…

ST Answer 4-1: I hear you Jim. It's certainly tough to enter a new realm in engineering, but try to find a mentor in the IC design group that can lead you into their world — you might want to check out the EDN “IC Design” site. I have posted some really good tutorial articles by IC designers there.

RD Answer4-2: On simulation, linear technology offers LT spice. It's a free schematic capture simulation and waveform viewer. As an ic engineer, there is no breadboards for the ic these days. So we make simulation work. With good models and understanding the limitations of the simulator we get very good agreement between simulators and silicon. If you are trying to learn IC design, look at the past 30 years of Journal of solid-state circuits. That's one place where schematics are published for ICs.

jimfordbroadcomA4-3: Thanks. I've tried LTSPICE, and the price certainly is right, and it's quite easy to use. Probably will have to use it again soon. Also, I've done some work with Agilent ADS. Tough sledding for a lab guy like me. Thanks for the reference to JSSC. I”m sure I can look up whatever I need on IEEEXplore. @steve.taranovich — thanks, I'll definitely look up the EDN site.

Q5: Do you think devices like the 2n3904 and the 2n2222 will stick around for a long time to come?

HS Answer5: I have no way of knowing about the future of the 2222 and 3904. However, given their popularity I expect they will last for the foreseeable future.

Q6: I'm interested in the thoughts from both experts about the potential for analog front ends with the booming sensors market. More of a market interest; I follow this area as part of my consultancy. At the high level there is all the buzz about Internet of Things, Smart Grid, Home Automation, etc. But practically all of that starts with (mainly analog) sensors that are monitored and eventually communicated. So I see a nearly 1:1 synergy of the big topics and demand for more integrated packages — sensor, AFE, even the radio part. I see lots of radios like BT or Zigbee or generic 802.15 as SiP or SoC, but not so much fully integrated solutions. In the companies that are traditional analog electronic providers, AFEs have been appearing frequently as new products in the last few years.

RD Answer6: BobDobkin here, the analog front ends for sensors is and will continue to be a big business. Also micromachined parts have the analog front and built in. As I see technology advance is an analog these front ends will get easier to accomplish with better precision.

Q7: Do you see backward/forward integration by companies like yours providing ready-to-go wireless sensors for sensor networks? Or will you stay more in the building blocks?

RD Answer7: Linear will probably stay with building blocks for wireless networking. The cost of developing the wireless circuit means that it needs to be pretty general. So we will end up making several chips that work well together to make a front end.

Q8: What are the biggest design cornerstones that you would give to a design engineer? What are the biggest lessons you've learned, career-wise or technical?

RD Answer8: I think one of the biggest cornerstones is the ability to understand analog circuits on an intuitive basis. After you have been looking it analog circuits long enough, you learn the language and understand how all the pieces work. At that time you can understand what a circuit is doing without equations and by inspection.

Q9: I'm going to change the subject a bit here if I may and bring up the subject of programmable analog arrays. Seems like every few years somebody tries to make a go of it and falls on their face. My own take on this subject is that the value of analog IC's is so tied to the process that making generic building blocks hampers their performance so much that the economics just don't work. Anybody else want to weigh in?

RD Answer9: I have never seen an analog array that worked enough to become popular. There are always too many compromises in the performance. They keep popping up over time and announcing their going to put linear Technology out of business. It hasn't happened yet.

Simple functions can be done. But the processes that are optimized for FPGA are not really good for most linear circuits. Also fine line processes for high density digital is too expensive when you need a large area linear transistor. It's a force fit this does not work well It is very hard to get inductance in an IC. And sometimes it shows up when you don't want it. We have had circuits that oscillated at 3 GHz because of inductance on the die. One final comment I wanted to put out there about analog arrays — probably not a good idea to try to make a business out of it. I mean, if a company like Touchstone Semi. with some great products (not analog arrays, mind you) and people couldn't get their stuff going, who will these days?

Q10: Is it possible to implement the functionality of a chip bead ferrite in an IC?

RD Answer10: Ferrite beads are magic! When it comes to stopping parasitic oscillation they are great. There is no equivalent within an IC but you do have other answers. Within ICU have control of the circuit components and the parasitics and the layout. You can find the oscillations in simulation and correct them.

Q10-1: Interesting challenge — ferrite bead on a chip! As a matter of fact, my colleagues here at Broadcom are quite experts at the Bluetooth radios, and the sales and mktg people have sold billions of them!”

ST Answer10-1: They are magic — just a piece of bus wire, slide the ferrite bead onto it and solder in place and noise and oscillations magically disappear.

RD Answer10-1: They are at the equivalent of a lossy inductor at high-frequency. But at DC, you only have the resistance of the wire.

Eafpres1 Answer10-1: It could be paired with an SMT wirewound inductor that just happens to act like an antenna at 2.5 GHz. Saw that done once; trouble is there are no guarantees the parts are on-frequency from part to part or lot to lot…

Jimfordbroadcom Answer10-1: Well, the IC designers do use active inductors on the chip once in a while. I understand active vs. passive is a tradeoff between power consumption vs. die area.

Eafpres1 Answer10-1: Even more magical is a common mode choke on a ferrite core. If you design well, the desired currents return on the other line, and cancel fields within the core as if they are not even there. The only attenuation is for common mode noise.

RD Q10-2: I wonder what the origin of of ferrite beads is. Where they have an accident, or were they deliberately constructed.”

Eafpres1 Answer10-2: This abstract says that Dr. Takeshi Takei of Tokyo Institute of Technology invented and patented iron oxide cores. It says TDK was actually founded to capitalize on this invention.

RD: Bob Dobkin
HS: Howard Skolnik
ST: Steve Taranovich

30 comments on “Ask the Experts Q&A: Transistors

  1. fasmicro
    April 26, 2014

    Question – what will be the future of transistors if in ten years we cannot further miniaturize? How do you think the press will interprete the annointing of an observation as a law (the Moore's Law)?

  2. goafrit2
    April 26, 2014

    >> How do you think the press will interprete the annointing of an observation as a law (the Moore's Law)?

    The press is never wrong. They will surely forget and move on to the new buzz. The question is not about the law as it is a metric by Intel to claim dominance and superiority in the tech space. But if you look in the last few years, speed alone does not win. People expect power, and other factors to come into play in their devices. That is why in the mobile world, Moore's law has been muted!

  3. samicksha
    April 27, 2014

    ferrite bead on chip sounds pretty impressive, after deciding size and material another important aspect is component must be in its resistive stage.

  4. SunitaT
    April 29, 2014

    In general there are three mechanisms that control the breakdown of bipolar resistors; these are the thermal instability, tunneling effect and avalanche multiplication. Thermal instability occurs when there is a large increase of leakage current when the junction temperature increases which then leads to destruction of the chip the moment it goes beyond the melting point of a semiconductor material. The other mechanism is the avalanche multiplication; with both the structure and epitaxy being controlled, breakdown voltage of a semiconductor material is predictable at the design stage.

  5. SunitaT
    April 29, 2014

    The issue of Hfe is quite interesting. It is very true that technology used in designing a transistor has an impact on its operation. If they are designed with large base width they will effectively operate well under high voltages while reducing the base width makes it more effectiv4 under low temperature.

  6. SunitaT
    April 30, 2014

    Moore`s Law is dead! It is time that we realized that we can no longer look at the future with the hope that computer chips will keep growing smaller and at the same time more powerful. As time goes by, we are little by little exhausting the limits of this progression in miniaturization. Even with the recent invention of Intel`s 3D transistors that give an opportunity for more transistors to be packed even tighter, there is still a negative driving force towards the density driven approach of coming up with transistors.

  7. RedDerek
    April 30, 2014

    @goafrit2 – It is interesting to see the general history of the processor over time and see how the speed and power evolved. What is clearly seen is that, in general, the power and speed go up together. There are times where there is a drop in power, but that is due to smaller semiconductor process features being implemented.

    One site that shows the curves is

    http://spectrum.ieee.org/computing/hardware/why-cpu-frequency-stalled

    Things are getting down quite small these days and research has been looking at optical computing (using light for the processor operation), and even using the electron orbit level to determine a 1 or 0 state.

  8. yalanand
    April 30, 2014

    You can be an IC designer but still have much interest to further advance in your chip designing ideas; you may not have time to go back to school because you may be busy at work or somewhere else. The best thing to do in my opinion is to try out simulation applications of different chip designers, if this does not work with you well then it is good to find a private mentor or trainer who can perfectly guide you through the field of graphic design.

  9. amrutah
    April 30, 2014

    @fasmicro:

    the next thing that is getting annointed is “More-than-Moore”, in short “MtM” as law.

  10. geek
    April 30, 2014

    “Moore`s Law is dead! It is time that we realized that we can no longer look at the future with the hope that computer chips will keep growing smaller and at the same time more powerful.”

    @SunitaT0: I'm not sure if I agree with this. What do you think about the research being done on nano-technology? The fact that nano-technology has the future of reducing the chip sizes to even microscopic levels directly falls under Moore's law from what I see. Hence, I don't really think the law is dead.

  11. samicksha
    May 1, 2014

    @Sunita, I agree that there physical limits to transistor scaling such as source to drain leakage, but there was a recent blog release by Pat Gelsinger, Senior Vice President Digital Enterprise Group, Intel. Who says The challenge is to exploit the transistor integration capacity provided by Moore's Law, deliver higher and higher performance, and yet stay within the power limits imposed in each platform segment.

    May be this blog can modify your comment,

    http://web.archive.org/web/20070713083830/http://www.ieee.org/portal/site/sscs/menuitem.f07ee9e3b2a01d06bb9305765bac26c8/index.jsp?&pName=sscs_level1_article&TheCat=2165&path=sscs/06Sept&file=Gelsinger.xml

  12. goafrit2
    May 1, 2014

    >> ferrite bead on chip sounds pretty impressive, after deciding size and material another important aspect is component must be in its resistive stage.

    In the resistive stage, what are the choices and possibilities? Do you mean the copper or the interconnet? We do not have lots of choices for the interconnect – you use poly.

  13. goafrit2
    May 1, 2014

    >> In general there are three mechanisms that control the breakdown of bipolar resistors; these are the thermal instability, tunneling effect and avalanche multiplication.

    If you make a CMOS transistor to operate in the weak inversion regime, you will also experience of the effects you see in bipolar junction transistors (BJT). Yet, the problem is that BJTs are not a huge market out there

  14. goafrit2
    May 1, 2014

    >> The issue of Hfe is quite interesting. It is very true that technology used in designing a transistor has an impact on its operation.

    Yes, the transistion frequency of a transistor depends on many factors including the size, mobility of carriers and other factors. That is the reason while innovation can come from the mechanical aspect (i.e. the process technology) that empowers a design.

  15. goafrit2
    May 1, 2014

    >> It is time that we realized that we can no longer look at the future with the hope that computer chips will keep growing smaller and at the same time more powerful

    Actually, it is not that important to start with. I am not buyig phones because it is the fastest, I buy phones because it is fast and also manages its battery efficiently. There are many factors besides the speed which Intel has pushed for years. Chips have to be smarter and that matters.

  16. goafrit2
    May 1, 2014

    >> Even with the recent invention of Intel`s 3D transistors that give an opportunity for more transistors to be packed even tighter, there is still a negative driving force towards the density driven approach of coming up with transistors.

    One of such is that your static power dissipation begins to overtake your dynamic power dissipation. When that happens, you lose the main benefit of CMOS technology over other technologies.

  17. goafrit2
    May 1, 2014

    >> Things are getting down quite small these days and research has been looking at optical computing (using light for the processor operation),

    In college, I tried to design optical interconnet/waveguides. The problem of using mirrors and glasses is that the cost cannot match today's silicon. I am confident that we will find a way to continue to innovate not necessarily by making these things smaller.

  18. goafrit2
    May 1, 2014

    >> The best thing to do in my opinion is to try out simulation applications of different chip designers, if this does not work with you well then it is good to find a private mentor or trainer who can perfectly guide you through the field of graphic design.

    Actually it is not as hard as you are thinking. Stanford has a program where senior engineers in companies can mentor their technical IC staff and at the end the staff gets a certificate. You do not even to visit Stanford. Of course you will still have to make payments.

  19. goafrit2
    May 1, 2014

    >> the next thing that is getting annointed is “More-than-Moore”, in short “MtM” as law.

    Get a trademark on that. It is indeed a nice imagination and construct

  20. goafrit2
    May 1, 2014

    >> The fact that nano-technology has the future of reducing the chip sizes to even microscopic levels directly falls under Moore's law from what I see.

    The problem with nanotechnology is that it has promised so much with little evidence. Until we see the impacts in the market places, few will agree that it can extend the Moore's law

  21. fasmicro
    May 1, 2014

    @Moore's law may still have a lot of relevance. However, I think it is reaching a dimishing returns. You can still make chips that “obey' it but will people buy them? Qualcomm and ARM have shown us that speed is not just the only factor to have better tech experience in the age of mobile and social. That matters a lot.

  22. amrutah
    May 2, 2014

    @goafrit2: Looks like it is already a trademark. Check this whitepaper on MtM the ITRS site.

  23. amrutah
    May 2, 2014

    @goafrit2:

    “I am confident that we will find a way to continue to innovate not necessarily by making these things smaller.”   

    I agree that there are many ways of doing the same thing and it calls for serious innovation, but at the same time the current market is still driven by smaller aspect ratio for gadgets for electonics invloving communication chipsets, micro or nanodrones, space related activiteis and so on.

  24. amrutah
    May 2, 2014

    I think one who is working closely with the ESD also has to be very careful about the secondary breakdown.  The parasitic BJT's that are involved in the ESD structures are to be sized such that they ovecome the secondary breakdown upto to some HBM or CDM limits.

     

  25. goafrit2
    May 2, 2014

    >> @goafrit2: Looks like it is already a trademark. Check this whitepaper on MtM the ITRS site.

    You can always count on America and the power of capitalism. It is a nice one though.

  26. goafrit2
    May 2, 2014

    >> I agree that there are many ways of doing the same thing and it calls for serious innovation, but at the same time the current market is still driven by smaller aspect ratio for gadgets for electonics invloving communication chipsets, micro or nanodrones, space related activiteis and so on.

    That is a fact but we must reach a theoritical limit soon and there must be a way out. You need to have the capability to continue to create value even when that limit is reached.

  27. amrutah
    May 6, 2014

    @goafrit2:

    Again I agree that there is a limit and we have to think about other possibilities.  On the contrary, along with miniaturisation there could be more of integration (like stacked die, stacked packages, photonics) which can reduce the area and power.  The essence is few companies are stuck with this philosophy and they are getting the results.

  28. samicksha
    May 7, 2014

    By interconnect do you mean inbuild or modulated/ mounted with cable.

  29. goafrit2
    May 8, 2014

    >> On the contrary, along with miniaturisation there could be more of integration (like stacked die, stacked packages, photonics) which can reduce the area and power

    Good point. New innovations can drive new ways of doing things which can help improve what we presently do today. That said, only when we move things to the electronics domain can we experience that benefit. Without the Moore's law working for us, integration becomes challenging.

  30. goafrit2
    May 8, 2014

    Here interconnect means wires or systems that connect devices like transistors, diodes, capacitors within circuits.

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