An obvious limitation in integrating a two-port or transistor parameter analyzer (TPA) is that historically curve tracers have been used to test power transistors and they can require a large amount of pulsed power to be adequately tested. Their breakdown voltages range to over 1 kV and currents to over 200 A. This is too much to expect from a single IC, yet it is not necessary for much TPA testing. Most devices are low in power, with voltages and currents that can be accommodated on-chip. Although high-power testing is a requirement for a full TPA, with μC-based measurement, power can be pulsed and the useful range of a TPA IC extended significantly.
A full TPA instrument can require floating power supplies and one or more floating grounds. Input and output ports do not necessarily share a common ground internally -- sometimes only at the output common terminal of the device under test (DUT). With floating supplies for the individual ports, it is possible to measure port currents with low-side current-sense circuits. It cannot be expected (though it is possible with dielectric isolation) to have isolated circuits on a single IC. Actually, the goal of a single SMU, sufficient for a single port, might be optimal for an IC because an expandable number of ports can then be added to the TPA. H-P used this scheme in their 4145A semiconductor parameter analyzer, which provided for up to 4 SMUs. An SMU with high-side current sensing is shown below.
Consider some integration challenges for the SMU. First, the output cable should, of course, not be included; it is the interface to the device under test (DUT). Second, the current and voltage drive and sense select switches are not an integration problem. The range switching for the current-sense resistance, RS, is limited by the current the analog (CMOS) switches can handle on-chip and by their maximum working voltage. Limitations of a wide common-mode output voltage range for current-range switching can be solved by using low-side sensing. The voltage sense amplifier also has range switching and is a PGA. It is important that voltage-sense inputs draw only a negligible amount of iDR, the output current, because it has already been measured by the high-side current-sense circuit. For a high-precision TPA, the current shunted by the voltage sense circuit (especially if it is a resistive divider) is not negligible and a compensation scheme is required. There are two different solutions to the current-voltage-sensing interaction problem.
The power-amplifier drive current depends on how much chip area can be allotted to its output stage. The output voltage is limited by the IC process which limits transistor breakdown voltage. All the rest, including the DAC and ADC, are well within integration capabilities. Sense resistors might be a challenge but some companies can trim on-chip nichrome resistors. Off-chip resistors require some extra pins but are also manageable. The question then is what the limits are on the sense and drive variables that will be useful in a commercially-viable TPA.
With a 35 V to 50 V IC process, a quite useful TPA is possible. A prospective goal for a TPA IC is a maximum 30 V for the output-port drive voltage, from the port that drives VCE or VDS. BJT IC processes for power op-amps not uncommonly have 36 V capability (such as the ST L165). How much current is possible from an IC can be estimated by looking at power op-amps. The L165 can source or sink over 1 A. A curve tracer limited to 1 A and 30 V is quite useful. One might wish for a higher voltage capability (to check MOSFET breakdown voltage or BJT second breakdown) and that might be provided off-chip in the design of the SMU output stage. It could accommodate the CB stage of an external high-voltage BJT that drives a power MOSFET. Then vDR can be extended to a very high voltage.
The SMU driving IB or VGS has less demanding voltage and current maximums and does not pose a limiting challenge. The maximum voltage should cover VGS of MOSFETs and have a full-scale range of 10 to 20 V. The current (for 1 A max at the output port) should be what is required for a BJT in saturation -- 100 to 200 mA. The input-port current-sense resolution should extend to less than that of the output port by about a decade. Voltage resolution should be better, to resolve differences in VBE or VGS.
A related problem of power is the dissipation on the chip. It can be reduced significantly by two methods. The first is a segmented amplifier design. The output power-stage transistor is implemented instead as multiple transistors that conduct only over their designed output voltage range. Each segment requires a separate supply input of a different voltage. The idea is to keep the voltage across the transistors low and turn them on and off in following the output voltage. Then none of them dissipates much power. Segments are selected by a circuit that is like a LED bar-graph encoder in dot mode.
The second method of on-chip power reduction is not to make the output amplifier a switching amplifier (which has switching noise) but an amplifier that is pulsed on for a brief time -- long enough to make a measurement. Measurement rate is affected by the duty ratio of the pulses and the power limitations of the chip determine it.
In this brief survey of SMU integration considerations, the SMU is feasible to integrate if the voltage and current limitations of the IC process allow it, and if the chip power dissipation does not make the measurement rate too low. In most cases, measurements require 0.1 to one millisecond of measurement duration. The drive and sense circuitry are at odds on the same chip in that the driver heats the chip and causes thermals in the sensitive sensing circuit diff-amps. Good IC layout practice keeps this from being a show-stopper.
Next, we will look at the challenges of combining SMUs into a two-port analyzer.