Microcontrollers (μCs) often contain a comparator that can implement a precise analog-to-digital (A/D) converter (ADC) with the addition of only an external resistor and capacitor. It is a charge-balancing or Σ- Δ
-Σ) ADC. The basic scheme uses a comparator which outputs μC input bit IN and requires one μC output bit, OUT. The circuit is shown below.
In μC software, the ADC routine is best implemented as an interrupt routine, driven by a timer of period tINT, the interrupt period. In the circuit above, the ADC reference voltage is the μC supply (VR = VCC). This assumes that the μC has CMOS output bits, so that the outputs for negligible current are near the rails:
If greater accuracy than VCC is required, instead of driving R directly from OUT, use it to switch accurate analog switches between reference ground (for 0) and an accurate VR (for 1). If the OUT-bit voltage levels are close enough to the rails and the μC is low in power use, then an accurate VCC can be supplied by the reference voltage source, VR .
Σ-Δ RC Constraint for n-Bit Accuracy
The charge-balance voltage waveform on the capacitor is a constant voltage with a small up-down exponential ripple riding on it at the frequency that OUT switches. If this varying voltage becomes too large, the ADC will not be linear enough for n-bit conversion. The larger the RC time constant, the smaller the ripple. How large must R x C be made to ensure n bits of linearity? Large enough so that the ripple voltage, ΔvC = vH - vL ≤ vLSB = 2-n x VR. Then
where vH and vL are the maximum and minimum values of the vC ripple. At full-scale, vH = VR and
or solving for R x C and applying the approximation, ln(1 + x) ≈ x for x << 1,
For tINT = 1 ms, and n = 8 bits, then R x C ≥ 256 ms. For n = 10, R x C ≥ 1.024 s. The allowable measurement rate is comparable to DMMs. Multiple conversion values of NX can be used in a running average so that the new averaged values occur at a higher rate once the initial set of values has been acquired.