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Keith Sabine

Analog Layout Automation: An Unsolved Problem

Keith Sabine
Brad Albing
Brad Albing
7/10/2013 8:21:13 PM
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Blogger
Re: Analog Layout Automation
@RedDerek - the issue of signals jumping from one plane to another or one trace to another is a serious issue. Then there is the effect of current flow in a trace flowing over a ground plane, and the resultant return current flow induced into a specific area. Not sure how well this is dealt with in the automated versions of layout software.

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RedDerek
RedDerek
7/10/2013 2:24:35 PM
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Master
Re: Analog Layout Automation
The digital realm of layout applied to analog does not work well, especially when the digital method tries to set one plane horizontal and the other vertical. Analog signals jumping from layer to layer can create signal noise to an unreasonable levels.

Power supply layouts are another human-involved situation that I have not found a good auto-router to use. This involves both the component placement and routing of feedback signals and current-sense signals.

Other challenges, besides just component placement, for analog layouts are places where shielding is required around a signal. I have brought in a signal to a board and have used ground planes above and below the trace, as well as running a ground trace to either side.

I see it difficult to incorporate layout challenges as above into an automated layout software. If something does come up, it could be a big deal in analog electronics and many people would be trying it out.

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DaeJ
DaeJ
7/10/2013 11:43:15 AM
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Master
Re: Analog Layout Automation
I think that Knowledge-based circuit simulation tool is updated by engineer. Even though there is automated layout flow, still manual process might be required. For example, routing can be automatically done, but depending on board shape and layers, Routing might be manipulated.

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Netcrawl
Netcrawl
7/10/2013 12:21:17 AM
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Master
Analog Layout Automation
@Keith great article thanks for sharing it, the process of analog circuits normally starts with the selection of an appropriate circuit topology, then analog designers iteratively optimize this circuit using knowledge-based circuit simulation tools to meet requirements, this is far more better ( or superior) than existing traditional tools and can give comparable results to manual layouts.

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More Blogs from Keith Sabine
Although digital design productivity has improved massively since the introduction of synthesis, advanced place and route and timing-driven design, analog design still relies on circuit simulation, manual layout and verification.
On a conventional CMOS process, NMOS devices are formed in a P well or substrate connected to ground (or the most negative supply in the circuit). PMOS devices are formed in an N well connected to the most positive supply
Early CMOS processes suffered a reliability concern that became known as latchup. It resulted in circuits either malfunctioning or consuming excessive power, and could be either inherent in the design or triggered by voltage spikes on IO pads that could forward bias PN junctions they were connected to.
Analog designers have always had to worry about physical layout to get good matching of devices.
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