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Keith Sabine

Power Routing in Analog Design

Keith Sabine
goafrit2
goafrit2
9/9/2014 3:40:25 PM
User Rank
Master
Re: Automated Analog Routing
Layout is one of those jobs that never help you grow in your career. Management does not even see you as being important. It is a very stupid job to be a layout engineer. Earn the dollars but that is not a career in the industry. I am not sure there is one that can lead any multi-displinary team. The best career path remains DESIGNER.

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fasmicro
fasmicro
9/9/2014 3:02:25 PM
User Rank
Master
Re: Automated Analog Routing
>> Only by considering the placement and routing as a single problem can automation really help.

Placement unfortunately cannot be automated either since the CAD does not understand the importance of that block. Automation is for the business of digital, in analog, the value is not that great.

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fasmicro
fasmicro
9/9/2014 3:00:15 PM
User Rank
Master
Re: Guard Rings
You are correct. Yet when the cost of failure is marginal to the propensity to lost sales, it makes no sense. If you have a toy that needs to sell for $4 and you think you must make  a chip that does not fail, there is a business risk there. Managing that is part of the business. But the best strategy  is not about best quality. There is a mix in that. You can have quality no one can afford and that means you are out of business. Concorde was discontinued because the quality took it out of the range of air travelers.

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Keith Sabine
Keith Sabine
9/7/2014 7:25:31 AM
User Rank
Newbie
Re: Automated Analog Routing
"I never like the constructs of automated analog routing because nothing in analog should be automated. It never works optimally."

I agree that not everything can be automated. But there is definitely a place for automation in non-super-critical blocks where you can get a result in minutes, not days. And then simulate and find yes, you need to tweak your design.

A good analog layout engineer will be thinking of the placement of devices and how to route them, with all the constraints, simultaneously. Most current tools don't work that way - they look at placement and routing as seperate problems. They need a lot of guidance to get even a vaguely useful result. Only by considering the placement and routing as a single problem can automation really help.

 

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Keith Sabine
Keith Sabine
9/7/2014 6:54:02 AM
User Rank
Newbie
Re: Guard Rings
Guard rings may not always be necessary, but they are not luxuries. They can usefully reduce substrate noise coupling - I have seen a chip fail due to this; the solution was to properly guard ring the PLL in the design and position it away from the noise source. It cost area, but it worked.

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goafrit2
goafrit2
9/6/2014 3:45:26 PM
User Rank
Master
Guard Rings
>> Another common approach is to use combined power and guard rings/rails. 

Guard rings are good but they take away area which could have been another chip especialy when making ultra-cheap consumer products. You have a budget to make a chip for $0.50. Guard rings become luxuries. Cost should drive everything that happens inside a chip.

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goafrit2
goafrit2
9/6/2014 3:42:26 PM
User Rank
Master
Automated Analog Routing
As can be seen, automated analog routing presents challenges compared to digital power distribution. 

I never like the constructs of automated analog routing because nothing in analog should be automated. It never works optimally. However, should you do it, first get all the critical signals manually routed. The non-critical ones can be auto-routed. Even with that, you may be out of luck during testing time.

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More Blogs from Keith Sabine
Although digital design productivity has improved massively since the introduction of synthesis, advanced place and route and timing-driven design, analog design still relies on circuit simulation, manual layout and verification.
On a conventional CMOS process, NMOS devices are formed in a P well or substrate connected to ground (or the most negative supply in the circuit). PMOS devices are formed in an N well connected to the most positive supply
Early CMOS processes suffered a reliability concern that became known as latchup. It resulted in circuits either malfunctioning or consuming excessive power, and could be either inherent in the design or triggered by voltage spikes on IO pads that could forward bias PN junctions they were connected to.
Analog designers have always had to worry about physical layout to get good matching of devices.
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