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Keith Sabine

Latchup and its prevention in CMOS

Keith Sabine
Keith Sabine
Keith Sabine
2/19/2015 9:17:35 AM
User Rank
Newbie
Re: Parasitic BJT
Hi Amrutah,

The strong well/substrate guard ring connections should help with latchup prevention as they reduce the well/substrate resistances and will help prevent forward biassing of the parasitic BJTs. So  no, I don't see a problem.


Also guard rings are widely used to reduce substrate noise (this is a topic for another blog!) and so are generally a good thing.


regards

Keith

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amrutah
amrutah
1/22/2015 5:24:33 PM
User Rank
Master
Re: Low supplies
Keith,

   Thanks, I had never explored the effect of voltage scaling on the Latchup.  It will be interesting to understand more on this topic.

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amrutah
amrutah
1/22/2015 5:23:07 PM
User Rank
Master
Parasitic BJT
Keith,

  I see another issue with the parasitic BJT.  Now when we have strong subtrate contacts/ guardrings around the devices, we form a lateral NPN (N+ of NMOS, P-sub guard ring, N-well guard ring).  Most of the times with P-sub connected to ground, will this cause any problem?

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Keith Sabine
Keith Sabine
1/22/2015 8:04:31 AM
User Rank
Newbie
Re: Low supplies
Amrutah,

Good question. Lower supply voltages help because the turn on voltage for the lateral parasitics is pretty independent of scaling - but there are many variables involved, like the distance of the base region of the parasitics (which decreases, hence potentially higher gain) and the resistance of the well/substrate etc. I'd be interested in hearing from others with practical experience of latchup resistance vs. scaling.

regards

 

Keith

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amrutah
amrutah
1/20/2015 6:08:42 PM
User Rank
Master
Low supplies
Keith: Thanks for this blog post.

   If we start operating at lower supply voltages, the reliability of the device can be improved due to latchup.  Do you see any problems with this?

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