One way to analyze the op-amp’s stability problem is by a method known as “noise gain compensation.” Noise gain, N(s), is the inverse transfer function of the feedback factor *β*(*s*). Adding a pole in the overall transfer function of the op-amp is essentially equivalent to adding a zero in the noise gain transfer function. Every op-amp can be modeled as:

where *A*(*s*) = open loop gain, A(*s*)*β*(*s*) = loop gain, and *A*_{CL}(*s*) = closed-loop transfer function.

The point of the intersection of A(s) with 1/*β*(*s*) = *N*(*s*), gives the crossover frequency of the op-amp. For the circuit to be stable, the total phase at the crossover frequency should be much less than -180^{o} (phase margin), or the slope at the crossover frequency should be less than -40dB/decade.

**Figure 4**

When an op-amp tries to drive a C_{L} > C_{Lmax}, then the load capacitance introduces a pole below the crossover frequency and, hence, has a slope of -40dB/decade at the crossover frequency as shown in Figure 4.

In order to compensate the op-amp to drive higher capacitive loads, there are two commonly used methods: out-of-loop compensation and in-loop compensation. The out-of-loop compensation uses an isolation resistor to stabilize the op-amp and is covered in detail in a section on resistors. The major drawback of out-of-loop compensation is that it requires a large series resistance, which causes significant voltage drop when the op-amp is driving large load currents. On the other hand, the in-loop compensation (Figure 5) uses a very small isolation series resistance (R_{iso}) and a compensation capacitor (C_{F}).

**Figure 5**

**MAX44246 op-amp circuit configured for in-loop compensation.**

**Figure 6**

The compensation capacitor introduces a pole (fPCF) which nullifies the zero (fZCL) of the load capacitor. Similarly, the pole from the load capacitor (fPCL) is nullified by the zero of the compensation capacitor (fZ_{CF}):

If we equate to nullify the pole-zero pair, we get:

Using a known value of Ro for MAX44246, C_{F} and R_{iso} are calculated to be 1nF and 5Ω, respectively, such that they drive at least 40nF of load capacitance (7x C_{L}) at a gain of ≅2x.

**Figure 7**

While the in-loop compensation does not require a large isolation resistor and, therefore, has advantages when large load currents are required, it does reduce the closed-loop bandwidth, sometimes significantly.

- Coupling capacitors are placed between the differential input terminals of devices to remove the common mode noise and to improve CMRR. Since the noise has a dependence on temperature, typically a C0G capacitor is used to keep the capacitance (and its ESR) constant over temperature. The experiment below shows the effect of the coupling capacitor (1nF C0G) on the 24-bit delta-sigma ADC INL measurements at 1ksps data rate.

**Figure 8**

**Effect of coupling capacitor on MAX11254 ADC INL measurements**

**Parasitic capacitance** is unwanted capacitance created on PCB boards, and every PCB designer should watch out for it. Two closely spaced signal traces can create a lateral parasitic capacitance within the same layer, or an unwanted capacitor can be created by overlapping trace/power planes on different layers. Guard rings are used to avoid noise injection between two high-speed signals on the same layer, while a ground plane sandwiched between two signal layers provides vertical isolation.

**Inductors** are passive devices that store energy in a magnetic field. The inductance of an inductor is defined as the change in flux with respect to the change in electric current. As we know from basic laws of electromagnetism, any current-carrying inductor produces a voltage across its terminal which is given by:

Where L is the inductance (H) and is represented by the formula below:

Where, l_{eff} = effective mean length of magnetic field in the core, µ_{0} = permeability of free space (4µ*10^{-7} Vs/1 Am), µ_{r} = relative permeability of the core, and A_{eff} = effective area of core/magnetic flux.

Inductors play a vital role in many electronic applications. Below we look at some important applications, where various properties on inductors are used to select a specific inductor for a specific application.

- Energy storing/transferring in DC-DC switching regulators: The performance metrics of DC-DC regulators critically depends on inductors. As per the datasheet, the recommended inductor range for the a 1A buck regulator is from 1µH-1.5µH. As the DC resistance (DCR) of an inductor increases with its inductance (Table 5), one may be misled to infer that using a 1.5µH inductor will be less power efficient than 1µH primarily due to high DCR losses.

**Table 5**

**Key specs to consider while choosing an inductor.**

**Figure 9**

**Efficiency versus inductance for MAX38643 buck regulator with different inductors.**

Figure 9 shows power efficiency (η) measurements for the 1A buck regulator with Vin= 5V, Vout=3.3V for two different inductors (1µH and 1.5µH). It shows that the efficiency for light load current range is higher with 1.5µH rather than 1µH, and the 1µH inductor provides better efficiency than 1.5µH above 500mA because of the decreased DCR.

In order to understand what other factors, in addition to the inductor DCR, affect the regulator losses or efficiency, we model all the lossy components in a synchronous DC-DC buck regulator as shown in Figure 10. The components on the left side of the dotted line are internal to the IC, whereas external components are shown on the right side.

**Figure 10**

Where *R*_{DSon_HS} = RDS-on of the high-side power FET, and *R*_{DSon_LS} = RDS-on of the low-side power FET, *t*_{on} = time period where high-side power FET conducts, *t*_{off} = time period where low-side power FET conducts, L = inductor value, *t*_{idle} = time between skip pulses where neither switch is on.

For the 1A buck regulator, the peak-to-peak inductor ripple current (Δ*i*_{L_p2p}) is the same for all inductor values, as it uses fixed peak current in DCM mode. Because the peak-to-peak inductor ripple current is fixed, a higher inductor value transfers more energy into the output capacitor and the idle time increases between skip pulses as shown in Figure 11.

**Figure 11**

Hence, a higher inductor value forces the converter to switch less often than a smaller inductor value. Thus, the overall loss of energy over a given time is lower with a large inductor value than with a small inductor value, which explains why 1.5µH provides better efficiency than 1µH at lower load currents.

The above example explains the role of the inductor in deciding efficiency of DC-DC switching regulators. Similarly, the choice of inductor for a given DC-DC converter architecture affects other key parameters like peak-peak ripple voltage, load/line transients, efficiency, and stability.