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Michael Steffes

Implementing an active output impedance to improve system performance in a differential precision SAR ADC driver

Michael Steffes
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Modern Rail-to-rail (R-R) output stage op amps, or fully differential amplifiers (FDAs), can sometimes get into a low phase margin condition for relatively simple circuits. Using the phase margin simulation test of Reference 1, a few simple external phase margin improvement methods will be shown. These tests and fixes are best done in simulation prior to board layout. Where the device model for a R-R output device is perhaps not including the higher frequency reactance, places for these tuning elements might be put into the board layout as a hedge against future stability problems.
Modern high-speed op amps and Fully Differential Amplifiers (FDAs) push the limits in every direction to deliver the best harmonic distortion at the lowest quiescent power. This often leads to relatively low phase margin designs in what would normally appear to be benign application circuits.
A recent >30MHz active filter design will be described here and updated to more accurately fit the desired response shape.
Include the op amp gain bandwidth product in the Rauch low-pass active filter performance equations
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