Many types of electronics can require some kind of power-on reset (POR). Without a proper reset, many things can go wrong. What's worse, with a badly designed reset circuit, things can go wrong with it. Reset is generally required by many types of electronics. Even simple latch circuits made with analog comparators can even require a POR.
Part of the POR is analog and part is digital. The POR sees largest usage in microprocessor, FPGA, and other mixed signal circuits. Some of what is usually included in a reset device includes an under-voltage detection method, a way to assert a valid reset level via driving to a logic low (or sometimes a high) state while in an under-voltage condition, and a time-delay upon valid voltage being reached. Additionally, a logic watchdog input is present on some devices. This monitors a logic output from the microprocessor or FPGA. The watchdog input expects to see low-to-high and high-to-low transitions at regular intervals. If not, a reset is asserted.
With that said, I have seen all manner of things go wrong with reset over the years. Some of the items included the old microprocessor RC delay power-up reset circuits -- these often did not include an under-voltage based reset on very early processors. Everything would generally start up fine, unless there was a post power-up sag in the voltage. Then on occasion the logic would become highly illogical in the processor. Furthermore, if the RC delay for the processor (as specified by the processor vendor) was not sufficient for other circuits in the unit to do things like come on frequency, then other parts of the system would "flake-out" even though the processor booted up OK.
These issues lead companies like Dallas-Semiconductor (now part of Maxim), Texas Instruments, Intersil, et al. to come out with one-chip solutions. These were fairly bulletproof, would keep the CPU and other circuits in reset during voltage ramp-up and ramp-down, and would provide for an adjustable reset delay. The reset delay was set by a couple of common methods. One technique used an external RC that set oscillator frequency inside the part to generate time-delay. The other method let the user tie pins high or low to effect the desired delay.
However, with that said, there were often other issues. Some of the ways I've been burned include platinum filaments being included in the packaging compounds. These lead to shorting of the pins. Other issues include larger-sized capacitors subject to breakage in handling. Or -- if the mechanical engineers did not nail the vibration analysis of the board and components dead on -- subject to shearing off.
Other things that can go wrong include issues keeping battery-backed RAM or even EEPROM in a safe state during voltage ramp. This can often be due to the lower operating voltages for battery-backed flash, and the fact that off-the shelf reset circuits have a brief time of invalid state right on voltage ramp. Another similar issue can be EEPROM depleting the hold-up capacitors prior to write completion, upon loss of power into the unit. This is similar to another reset function that monitors the power-supply input to detect loss just a little bit more quickly. Still, you are at the mercy of the large hold-up capacitors, the value of which has a wide manufacturers tolerance. Further, capacitance varies a lot with temperature.
Jumpers and switches that are intended to disable the watchdog function (used during special testing conditions) can be another source of misery. Vibration, temperature cycling, and human error can cause your carefully designed watchdog circuit to become useless. It's best to use a soldered-in jumper (e.g., a 1206 zero ohm jumper) -- something easy to unsolder and re-solder and large enough for a quick visual check.
Modern reset ICs can solve many issues, and I've even seen other issues (not usually associated with POR) solved with one of these in the circuit. It is also possible to perform the reset, and loss-of power functions with comparators and discrete components. One must weigh the pros and cons of each approach -- often in compact systems there may not be room to add a larger number of discrete components for a POR function.
What all are each of your experiences with doing the Reset Function for circuits?