Editor's Note: The following tutorial is one of a series of six on transistor theory by Howard Skolnik, retired Burr-Brown designer. Skolnik and Bob Dobkin, CTO of Linear Technology, will be our experts on March 26, 2014, at 1:00 p.m. ET (10:00 a.m. PT) for the first session of “Ask the Experts” on Planet Analog. (Note: This is a time change from our original date.) This three-part tutorial from Skolnik is meant to mentor and provoke questions for those who need to know analog design but are not analog engineers. Please bring your questions on March 26. I will be sending instructions for signing in to this chat session shortly.
There are many applications for one or two transistors. These include voltage and current amplification. Described here, in part 1 of a series, is an easy to understand way of visualizing the operation of a bipolar transistor in its linear operating region. This technique can be applied to the design of simple as well as sophisticated circuits.
First-order understanding
It is most important to understand that a transistor is an impedance converter . The key to grasping practical transistor circuit design is to visualize the impedances seen when “looking into” the base, emitter, and collector terminals. One useful result is that the ratio of the collector to emitter impedances is the transistor’s small signal “voltage amplification.”
- Operating Point: The terminal impedances are dependent upon the quiescent operating point of the transistor (IE ).
- Current Gain: The transistor exhibits a current gain between the base and collector terminals. This current gain (beta, β) is defined as IC /IB , where IE = IC + IB . Typically, β > 200 and we can say that IE ≈ IC .
- Emitter: Once the operating point is found (or selected), the internal emitter impedance (Re) is easily calculated. If an external resistor (RE ) is inserted at the emitter, the total becomes Re + RE . In common usage, we generally take RE to mean either the external emitter resistor or the total.
- Base: The impedance looking into the base is β * Re, or β * (Re + RE ), when an external RE is present.
- Collector: The collector impedance (Ro ) is not so intuitive. Figure 2 shows the characteristic curves for a typical NPN transistor. An “ideal” transistor would have an infinite Ro . That is, the collector current would not change as the collector-emitter voltage changes (Ro = ΔVCE /ΔIC). For a “real” transistor, Ro is the slope of the Vce verses IC curve. If external components are present at the collector, the total Ro (Rotot ) is the parallel combination of these impedances. In some cases, the external impedances (RL ) will be much lower than Ro , and Ro can be ignored.
Useful assumptions
While not necessary, it is sometimes appropriate to start by making certain assumptions. These often include a high (>200) DC current gain (β). This means for any collector (or emitter) current, the base current can be ignored. Another common assumption is that the internal collector impedance (Ro ) is very high; that is, much higher than the external impedance (Ro ). As we will see, non-ideal β and Ro are easily included to refine the accuracy of a given transistor stage design, if needed.
Without getting into semiconductor theory, please accept that the impedance looking into the emitter is a constant at a given operating current (IE ) and temperature and changes inversely with Ie in a linear fashion. If temperature is considered constant at 25°C, Re = 26mV/IE , or 26Ω @ 1mA.
There is much more to come in future parts of this series.
I think BJT design is a dying art. Few universities teach them. With CMOS offering better density and static power dissipation numbers, there are not many reasons to master BJT except of course for the RF design.
The current gain is defined depending on the DC operating point of the BJT, when it works in the” direct active area ” the gain is usually >200.
The external resistance is added to the emitter terminal, to realize some particular circuits, for example the ΔVBE voltage reference circuit.
@goafrit2: You're correct when you say “I think BJT design is a dying art. Few universities teach them” The market requires also the BJT for radiation hard modules , that are qualified by DLA in the US and certified by mean of the JANS qualification.
If what they are doing in the neuromorphic field picks up, watch out for more fascinating interests in BJT. Though it has an obvious flaw with its lack of integration density, there are many things only BJT can do best. The gain is awesome.
@fasmicro: Indeed it's a good gain and a very healthy one too. I think the results will be shown in the future.
BJT model could be a different in the Pspice or any tool used in the semiconductor. Based on Model library, integrated circuit performance would be affected based on model library. Gain could be one of parameters.
@fasmicro, that's correct, this is a reason for why it is important to avoid the BJT technology from becoming lost.
From my experience, the low currrent rolloff point of the current gain varies a lot but the high current rolloff point does not. You can depend on the consistentcy of where the high current beta starts to drop. At higher currents the beta drops off because the transistor runs out of carriers. Transistors should be operated in the mid current range of the beta but do not operate close to the low current region where the beta drops.
The base current needed to saturate a transistor is 1/beta times collector current needed for saturation. When a transistor goes into saturation, the beta drops significantly. Beta also varies with temperature, so to saturate a transistor use the worst case cold temperature beta times some factor of safety like 2 or 3.
I remember doing load line designs with vacuum tubes – which then was translated to BJTs. I wonder if this skill is still being taught in the analog classes?
@Goafrit2: I agree with so much dominance of the CMOS devices the BJT is taking a back seat when it comes to integration density, kind of applications.
We still need to study these because,
The beta falls at high currents because of a combination of base push-out, increased base transit time, and Auger recombination. To say it runs out of carriers is incorrect, because in fact it has more carriers than ever (a phenomenon known as conductivity modulation, which is what brings IGBTs to life).
Indeed, BJT knowledge is useful for understanding references, parasitics, and snapback- and SCR-based ESD handling. Additionally, BJTs ought to be taught because MOS, JFET, and Vacuum Tube subthreshold currents are very similar (i.e., thermally activated). Furthermore, BJT knowledge is essential for understanding IGBTs.
>>The market requires also the BJT for radiation hard modules , that are qualified by DLA in the US and certified by mean of the JANS qualification.
I do not understand the point of this comment. Do you mean only BJT can be used to make radiation-hard systems? I know irrespective of BJT or CMOS, you need a special process tailored for the space environment.
>> Indeed it's a good gain and a very healthy one too. I think the results will be shown in the future.
If you bias your CMOS in weak inversion region, you get the same gain. At that stage, it becomes an exponential gain over the square law you get in the strong inversion region.
>> Based on Model library, integrated circuit performance would be affected based on model library
That explains why it matters to use the right BSIM parameters. Also, you need to use ensure SPICE does not trick you into making bad designs and think they are great. My hypothesis is that the first design is not useful until when you have test data to validate the model. If you can afford great EDA like Cadence, that problem disappears.
>> that's correct, this is a reason for why it is important to avoid the BJT technology from becoming lost.
It is very possible it will be here for a long time because of the works in the biomorphic community which is making BJT like a rock star. Yet, if we cannot solve the integration problem, I do not see the roadmap in this. BJT is bad not just for the type of transistor, it does not yield great integration like CMOS and that is money
>> Transistors should be operated in the mid current range of the beta but do not operate close to the low current region where the beta drops.
It is good to notice that not all transistors exhibit this characteristics as you have noted. Also, you need to carefully watch the region of operation. What happens in strong inversion differs what you get from the subthrehold region. So, that understanding is very vital in all analyis.
>> I remember doing load line designs with vacuum tubes – which then was translated to BJTs. I wonder if this skill is still being taught in the analog classes?
No – because there is no market for vacuum tubes. I am not aware of any program that does any research in tubes. They seem to be happy in the museum these days and not in engineering labs.
I have been making this for years and also looking at what people do, I do not see much innovations to actually warrant the study of BJT just for this. Of course, if all the elders in most of the semiconductor companies retire with BJT skills, this could become a hot commodity. At the moment, it is hard to see the driving value.
Additionally, BJTs ought to be taught because MOS, JFET, and Vacuum Tube subthreshold currents are very similar (i.e., thermally activated)
That is a good point. The best way to understand CMOS biased in subthrehold is to assume one is learning BJT even though it is a CMOS device. At weak inversion/subthrehold, the physics looks more like BJT than CMOS.
@Hughston, the Beta depends on the collector current, usually the range of Ic corresponding to a constant value of Beta (i.e. hFE) is quite wide so it's easy to avoid to force a current close to the low currrent of rolloff.
@goafrit2, the BJTs are not the only devices that can be utilized for radiation hard applications, my point is that this dying art is really precious also for this aspect, BJT are widely , but not exclusively, utilized for aerospace applications
@goafrit2 you're correct, a special process is required for aerospace devices: design strategy , materials, certification of the robustness to the radiation are some examples.
the BJTs are not the only devices that can be utilized for radiation hard applications, my point is that this dying art is really precious also for this aspect, BJT are widely ,
Between the type of the transistor and process, the more important is process. The process seems to be the main driver in these applications than whether BJT or CMOS
@fasmicro: the process is important it's true, moreover the specific solutions, that are utilized by mean of the same process, are more important, for example a diffusion implemented by a diffusion process , i.e. more superficially, might protect the device from a failure better than an implantation, that can be done more deeply inside the silicon substrate but might create some damages in the reticle and allow the radiations to further damage the ICs. It all depends on the particular issue to be solved to ensure the overall reliability of the aerospace circuitry .
>> the process is important it's true, moreover the specific solutions, that are utilized by mean of the same process, are more important
That is why they talk of mature process that can be easily replicated. You have these fragile processes and you cannot be sure what you get.
>> It all depends on the particular issue to be solved to ensure the overall reliability of the aerospace circuitry .
I have worked in a process used for biomeds but yet to be involved in any aerospace project to actually experience what the unique features of the process are. When I began working with floating gates, I learnt the core benefits of specialized processes in design. This could be one of such in places with radiation issues
The mature processes many times are unreliable, when utilized for new purposes, it depends on the specific situation, sometimes a new technology may work well for a specific application environment.
>> The mature processes many times are unreliable, when utilized for new purposes, it depends on the specific situation, sometimes a new technology
That is actually the other way round. Matrure processes mean that most of the bugs and issues have been fixed. They tend to be reliable. However, they may not be great for some new products but that does not mean they are unreliable.