*Editor's note: The following tutorial is one of a series of six on transistor theory by Howard Skolnik, retired Burr-Brown designer.*

In Parts 1 and 2 we explored the fundamental terminal impedances of a transistor and their relationship to small signal ac gain. In Part 3 we continue to refine the design topology towards practical, reproducible, solutions.

One way to *desensitize* the circuit to variations in V_{BE} and temperature is to add an external R_{E} that “swamps” the transistor's internal R_{e} . In addition, this adds negative feedback to stabilize I_{E} and greatly increases the input impedance to the base.

**Example**

Let R_{L} =10K and R_{E} =1K with I_{E} =1mA. The voltage gain is always R_{L} / R_{E} . But, now R_{Etot} = R_{e} + R_{E} . We might expect that R_{L} and R_{E} will dominate, so the voltage gain would be 10 (10K/1K). However, this is NOT exactly correct.

Let’s take a closer look. First, the actual R_{Etot} is 1K+26Ω = 1.026K. Second, from Figure 2 in part 1, we recall that R_{o} ≈100K. With R_{L} =10K, the parallel combination is 9.09K. Therefore, the actual gain will be 9.09K/1.026K = 8.86. This might be *good enough,* but it is not 10! One needs to do the algebra to find the R_{L} that when in parallel with 100K and divided by 1.026K = 10. The solution is found by solving for R_{L} in [(100* R_{L} )/(100+ R_{L} )/1.026]=10. The answer, R_{L} = 11.43K. Now, when R_{L} (11.43K) is in parallel with R_{o} (100K), the result is 10.26K. And, 10.26K/1.026K = 10.

That’s the good news. However, with I_{C} =1mA, the DC voltage drop on R_{L} will be about 10V. This suggests other practical limitations. If, for example, the power supply (V_{1} ) is 15V, the maximum signal amplitude at the output will be limited to about 2V_{pp} . Further, if we wanted a voltage gain of 100, this would require a “total” R_{L} of 102.6K, which *cannot be achieved* with the given R_{o} (100K). Remember, when putting resistors in parallel, the result is always less than any of the original elements. Even if we could yield a total R_{L} of 102.6K, a minimum power supply of more than 110V would be required. A shocking thought!

These results do not take into account the likely loading effect on the signal source and the influence of whatever is connected to the output (external load). For “accurate” results, these factors must also be considered. However, doing so is not difficult. It is just a matter of parallel or series resistors or voltage divider effects that need to be accounted for.

The point of the above exercise is to demonstrate the need for taking real transistor characteristics into account to produce accurate analog performance.

In part 4 we consider the effects of a coupling capacitor and discover how to achieve higher gain.

Hi, please note adding a emitter resistance also increases the BJT output impedance which is not just R0…

Why do you suggest that the output impedance increases?

Sorry, I've been imprecise I meant the impedance seen from the collector changes and increases becasue of RE and this affect the stage gain. Obviously with a “small” RL is not important…

You are correct that increasing RE has advantages. These include a more stable operating point and lower distortion. Both are due to the external RE swamping the internal Re that is highly non-linear and very temperature dependent. However, I do not understand your point about increasing RO? First we should be sure to make a distinction between the internal collector impedance Ro and any external impedances which I lump together as RO (or RL if you prefer). To find the ROtotal we need to find the parallel combination of Ro and all external RO's. When we know ROtotal, IE (to calculate Re) and the value of any external RE, we can calculate the small signal gain which is equal to ROtotal/(Re+RE). The internal Ro is defined as Δ Vce/Δ Ic which is seen as the slope of the transistors' Ic vs Vce curve. Ro is dependent upon IE, but I do not see how it could be dependent on RE. Perhaps you mean that inserting or increasing RE requires that the ROtotal be increased to achieve a given desired gain? This is true. If I am still missing your point, please explain further. Thank you.

Hi,

what I mean is about the impedance you see looking into the BJT collector….probably we are using different name for the different resistances/impedances around…

Let's consider the simple Commonn Emitter BJT and not considering the load resistance Rl, just calculate which is the impedance seen from the collector…it is Ro which can be approssimated, for a small signal analysis, as (VA + VCE)/IC where VA is the BJT Early voltage, VCE the bias collector emitter voltage…and so on…

Now suppose to add in the circuit the RE on the emitter. Make the same, which is the impedance seen looking into the collector? Is no more Ro = (VA + VCE)/IC but increases to: Ro + gmRo (RE//Rb'e) + RE//Ro!!

If you have a small Rl an increased resistance doesn't affect the gain claculation but if Rl is high it can…

Just it..I'm sorry I haven't explained myself well before…I know sometimes I use Ro R0 and Rout for my purpose but when telling others I should be more precise or as this time I just make confusion 🙂 !!!

@ForzaUgo >> (…)

the impedance seen from the collector changes and increases becasue of RE and this affect the stage gain.When we add the emitter resistor R

_{E}we gain in circuit bias stability but also lose gain. When used as small signal AC amplifier we add a bypass capacitor in parallel with R_{E}(emitter-to-ground) so we keep low the effect of R_{E}on AC gain.