In the third part of this series, Build Your Own Curve Tracer, Part 3: TPA202 Output Port Circuit, the TPA202 output-port circuit was described. The two port SMUs are the main functions of the TPA, though a display of values and a supply are necessary auxiliary functions, described in this Part 4 which continues the summarized circuit description derived from the TPA202 Manual.
The TPA202 displays voltage and current values on a DVM display. The DVM circuit is shown below.
The DVM is a modified dual-slope A/D converter with LED 3.3 digit + sign display. The input has a bipolar range of ±1 V. The functional diagram is shown below. N = 3; IR = 200 μA; RX = 20.0 k Ω ; C = 4.7 μ F; IX (fs) = –50 μA.
The semi-discrete DVM could be implemented with a 40-pin legacy DVM IC. These ICs have 4.3-digit capability and are comparable in cost to the semi-discrete design. The semi-discrete alternative was chosen to provide more circuit observability, design versatility, a zero-scale feature, achieve design re-use, provide ADC tutorial value, and invoke some nostalgia. A slightly superior alternative at 3.3-digit resolution is the optimal integrating ADC, a Σ – Δ converter. However, it requires almost as many parts for a DVM. This DVM design has been refined to avoid typical zero-scale problems with dual-slope ADCs that Σ – Δ converters inherently avoid, and is thus only slightly suboptimal.
The design challenge is to minimize parts while maintaining performance. The 3-digit LED driver uses only 2 ICs plus a dual flop for leading “1” and overflow indication of an invalid reading. This DVM design, in slightly modified form, is also used in the Innovatia Floating Differential Source (FDS) and in the TPA204, the FDS-to-TPA adaptation, which is a computerized version of the TPA202. In the TPA204, the analog part of the modified-dual-slope DVM is retained, and the DVM becomes a 14-bit ADC with counter and display driver in an Atmel ATmega8515 μ C.
The DVM input drives an absolute-value circuit, U24B. To avoid polarity errors near zs, U24 op-amps must have low offset voltage error and accurate resistors. To increase accuracy, R4 could be made two 10.00 kΩ, 0.1 % resistors in parallel (at $0.25 US each), and R15, R5, and R16 could also be 0.1 %. The additional cost of the precision resistors avoids a trimpot. U24 could be upgraded to a TLC2272A (or TLC2262A) for low offset voltage, and is the preferred op-amp for U24.
The DVM reference consists of U15, a TL431 voltage reference, U14A and Q2, which form a V/I converter that is the source of IR . R12 calibrates the fs scaling or gain of the converter to correct for the tolerance of U15 and essentially everything else. There is no offset adjustment.
The operation of the ADC is understood by referring to the output of integrator U14B, shown below.
The measurement frequency is fX = 1/TX = 2.5 Hz. U13, a 10 kHz timer drives the 3-decade counter chain in U5. Its overflow (V, pin 14) drives a /4 dual JK flop (U2) for a total divider count of 4000. U1A is a NAND RS flop and is at the center of the converter control. When the counter overflows and U2B Q goes low, it pulses low (through the C5, R14 RC differentiator) the U1D input and its output (pin 11) is forced high. Most of the time, the U1A input is also high and U1A goes low (pin 3), which holds U1D high. R19, R20 form an offset divider that switches IR between D7 and D2. When U1D is high, D2 is reverse-biased and IR flows through D7 into the integrator, causing the output voltage to decrease, as shown in the waveform above.
During this first interval of the measurement cycle, both input, –IX , and reference, IR , currents are integrated, and IR has greater magnitude. Comparator U3A detects the waveform crossing 0 V and changes its output state from high to low. This is translated through Q1, causing the U1A RS flop input to go low, forcing its output high. Then the U1D output goes low, turning off the reference current through D2 so that the integrator only integrates –Ix . The waveform reverses slope and heads upward until the end of the cycle. After a cycle or two, the integrator waveform stabilizes and the reading becomes stable. When a stable integrator waveform crosses 0 V at tX , the converter transfer function can be derived from the above waveform. The capacitor v-i relationship and integrator voltage is
Solving for the time ratio as the output, which is converted to counts by the counter, the ADC transfer function is
The input voltage is converted to a current by the integrator input resistor R13 = 20.0 k Ω so that 1 V/20 k Ω = 50 μA fs. For the cycle count (4000), the converter output is the fraction of the fs counts, or
where uX is the output count as displayed. Thus 1 V of input corresponds to 1000 counts and the scale factor is 1 mV/count or 1000 counts/V. The counter accumulates counts at the rate of 1/TX and the total count is 4000 (1000 in the 4553 times 4 in the 74HC76, U2). The converter can overrange up to less than 2000 counts for a stable conversion. (tX < TX /2 for stability.) With some overrange, the measurement ranges overlap.
The TPA202 power supply is a non-switching supply using 50/60 Hz transformers and peak-charging rectifiers. The circuit diagram is shown below. The TPA202 power supply has 7 outputs and two separate grounds. The OUT-port supply has three floating voltages: +12 V(F), +20 V, and +40 V referenced to the floating ground (F). The 20 V and 40 V outputs are unregulated. The +12 V(F) supply is derived from the 20 V supply and is regulated by U16.
The grounded supply has ±12 V supplies that are regulated by U18 (+12 V) and U17 (–12 V). Diodes (D33, D34) have been added in series with the ground terminal of these regulators to increase their output voltage by the diode drop of about 0.75 V. Thus the actual voltage magnitude of these supplies is closer to 13 V. This somewhat higher voltage is necessary to provide adequate voltage margin to the INP-port amplifier output stage so that it can supply an output voltage range (open circuit) of at least ±10 V.
The ±5 V supplies are regulated from the ±12 V supplies. They power low-voltage op-amps that cannot operate from ±12 V. The DVM and OISN low-side circuit use these voltages.
The sources for the regulators are 50/60 Hz line-powered transformers (T1, T2) and full-wave diode bridges (U19, U22, U23) followed by storage capacitors (C22, C28, C9, C10) form peak-following unipolar outputs. Although an alternative was to use a switching supply (as in the TPA204), in accordance with the TPA202 design theme of simplicity, the line-frequency supplies were chosen, though they can be replaced by off-the-shelf switching supplies. The relatively low precision of the TPA202 reduces the likelihood of power supply switching noise problems. The simple line-frequency supplies also reduce the complexity of the instrument and ensure that power sources will not be an impediment to performance.
Calibration of the TPA202 is simple. The DVM scaling is adjusted first, then IISN CMR and IVSN adjustment. Apply an input voltage to the DVM by setting either INP or OUT source to V. Adjust the voltage to show a displayed reading near 1000 counts. Measure the DVM input voltage with an accurate DMM and adjust the fs DVM FS CAL trimpot until the readings agree.
To calibrate the CM ADJustment of the ISN circuit, open the input port for no output current. With no input voltage across the sense resistors, adjust the CM ADJ trimpot for no changes in IISN voltage while the output voltage is being varied by the front-panel control. The IVSN scaling is set by measuring the input-port voltage with a reference DMM and adjusting IVSN scaling until the DVM input-port voltage reading agrees with the external DMM.
During construction, some alternatives exist for a more accurate unit capable of better calibration. Additional trimpots can be added in multiple places for scaling adjustment: with R90 for VSN compensation adjustment; with R87 for OVSN scaling; with R77 for OISN scaling; and for calibration of each current range, 12 more pots in series with each of the 6 higher sense resistors of each of the ISNs. At some point, it becomes evident that adding so many adjustments to the TPA202 is suboptimal. A μC-based instrument can perform two-point calibration for every measurement setting without requiring trimpots. The analog TPA202 subsystem is suitable for μC-based design, and the TPA204 design uses it as a microcomputerized version of the TPA202. However, for around 1 % inaccuracy, the TPA202 can have a place on the electronics workbench.
In the next part, we turn to TPA202 operation and application.