Challenges of Mixed-Signal Simulations, Part 2

This is a guest blog from Steve Netto, a mixed-signal designer.

In Challenges of Mixed-Signal Simulations, Part 1, we discussed the Spread Spectrum Design. Now let us look at all the design pieces that must be matched and kept track of in this design flow.

Table 1, shown below, shows a sample compilation of such data: The analog and digital blocks, the different engineers, and the measurement results each is responsible for validating.

Table 1

Mixed-signal Design Flow Matrix

Mixed-signal Design Flow Matrix

As in any design there will be issues that need be fixed. Keeping track of the various versions of the files for the various devices between the different engineering groups is challenging.

Now, if we extend this example to a slightly more complicated design such as a laser controller, the design flow becomes more complex. Consider the figure below (Figure 4) that shows the SSPLL analog and SS digital inserted into the laser control path with analog circuits for Pulse Width Modulation (PWM), pulse gating, pulse counting, and another digital circuit for pulse shaping control. This adds four more engineers for each of these complex blocks and the need for spectral analysis at the outputs of each of these analog blocks.

Additionally, analog paths of this size would require that VerilogA (Analog Verilog) models for each block be available in order to speed up simulation and analysis in the mixed-signal simulation environment. In such a scenario, managing the different versions of the various files between the different designers becomes extremely complex and challenging.

Figure 4

Laser Control with SSPLL Inserted

Laser Control with SSPLL Inserted

It’s easy to see why design flows for mixed-signal simulations — where engineers both analog and digital for different applications and tests such as spectral analysis — can become highly complex and very difficult to maintain.

In a mixed-signal design flow, engineers typically go through several iterations of data exchanges. Making sure that a verification engineer has the design files that the design engineer intended could be a nightmare in absence of a data management solution. A design flow built around the data management system will eliminate any confusion caused by the different design groups. The data management system brings predictability, traceability and accountability to the design cycle. Furthermore, access to data can be controlled on a per user or geographical basis, which might be critical if contractors are involved.

To conclude, the need for revision control and database management is paramount for reducing the risk for such mixed-signal design flows. An incorrect schematic or an old RTL file, for example, can produce incorrect results that may take considerable time to debug. While there are several data management solutions available from different vendors, ClioSoft's SOS seems to be the most popular, especially for its ease of use. The Visual Design Diff (VDD) from ClioSoft graphically displays changes between versions of schematics and layout, quickly answering the question “What the &*%$ changed?”

About the Author:

— Steven Netto has more than 20 years of experience with mixed signal design and verification in the Silicon Valley. He has worked on many communications-based microcontroller designs for corporations like Zilog, Intel, and Microsoft. Design applications include Smart meter, Spread Spectrum, and 3D time of flight motion sensors. Steve holds a Bachelor of Science in electrical engineering from California Polytechnic State University in San Luis Obispo and a Masters degree in electrical engineering from Santa Clara University .

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