Challenges & Requirements: Voltage Reference Design for Precision Successive-Approximation ADCs, Part 2

Reference Output Drive

Figure 3 shows a typical reference circuit. The voltage reference may integrate a buffer that has sufficient drive current, or a suitable op amp can be used as a buffer. To avoid conversion errors, the average current required at a particular throughput should not cause the reference voltage to droop more than ½ LSB. This error will be most pronounced during a burst conversion, as the reference load will go from zero to the average reference current at that throughput.

Figure 3

Typical precision successive-approximation ADC reference circuit.

Typical precision successive-approximation ADC reference circuit.

Using the AD7980 16-bit ADC with IREF = 330 µA and VREF = 5 V as an example to determine whether a reference has sufficient drive capability, the maximum allowed output impedance for a ½ LSB voltage drop is

Most voltage references don’t specify output impedance, but they do specify load regulation, usually in ppm/mA. To convert to output impedance, multiply by the reference voltage and divide by 1,000. For example, the ADR435 ultralow-noise XFET® 5-V reference specifies load regulation of 15 ppm/mA maximum when sourcing current. Converting to ohms gives

So, the ADR435 should be suitable from an output impedance perspective. It can source up to 10 mA, which is more than enough to handle the 330-µA average reference current. When the ADC input voltage exceeds the reference voltage, even momentarily, it can inject current into the reference, so the reference must also be able to sink some current. Figure 4 shows the diode connection between the ADC and reference inputs that can cause current flow into the reference during an input overrange condition. Unlike some older references, the ADR435 can sink 10 mA.

Figure 4

AD7980 analog input structure.

AD7980 analog input structure.

As the reference current requirement scales linearly with throughput, a higher output impedance (lower power) reference may be acceptable at lower throughput rates, or when using ADCs with lower throughput, such as the 500 kSPS AD7988-5 or the 100 kSPS AD7988-1 (IREF = 250 µA). The maximum output impedance can be calculated with the reduced reference current. Note that these equations should only be used as guidelines, and the selected reference should be tested for drive capability in hardware.

A reference buffer can be used when the drive of the chosen reference is insufficient, or when a micropower reference is preferred. This can be implemented with a suitable op amp in a unity-gain configuration. The op amp must have low noise and suitable output drive capability, and it must be stable with a large capacitive load. It must also be able to supply the necessary current. Op amp output impedance is not generally specified, but can often be determined from output impedance vs. frequency plots, as shown in Figure 5 for the AD8031 80-MHz rail-to-rail op amp.

Figure 5

AD8031 ROUT vs. frequency.

AD8031 ROUT vs. frequency.

The output impedance is less than 0.1 Ω below 100 kHz and less than 0.05 Ω at dc, so this is a good choice in terms of output drive for our example of driving the AD7980 at 1 MSPS. Maintaining low output impedance over a wide frequency range is important for driving the reference input. The reservoir capacitor will never completely smooth out the current draw at the reference input, even with a large capacitor. The frequency content of the current ripple will be a function of the throughput and the input signal bandwidth.

The large reservoir capacitor handles the high-frequency throughput-dependent current, while the reference buffer must be able to maintain low impedance up to the maximum input signal frequency—or to a frequency where the reservoir capacitor impedance becomes low enough to supply the necessary current. Typical plots in reference data sheets show output impedance vs. frequency and should be taken into consideration when choosing the reference.

The AD8031 is a good choice, since it is stable with capacitive loads greater than 10 µF. Other op amps, such as the ADA4841, will also be stable with large capacitors, as they mainly have to drive a stable dc level, but particular op amps must be tested to determine their behavior when loaded. It is not a good idea to use a series resistor before the capacitor to maintain stability, since this will increase the output impedance.

A reference buffer is very useful for driving multiple ADCs from one reference, as is the case in simultaneous-sampling applications, such as that shown in Figure 6.

Figure 6

Reference circuit driving multiple ADCs.

Reference circuit driving multiple ADCs.

Each ADC reference input has its own reservoir capacitor placed as closely as possible to the reference input pin. The trace from each reference input is routed back to a star connection at the output of the reference buffer to minimize crosstalk effects. Reference buffers that have low output impedance and high output current capability can drive many ADCs, depending on their current requirements. Note that the buffer must also be stable with the extra capacitance associated with multiple reference capacitors.

9 comments on “Challenges & Requirements: Voltage Reference Design for Precision Successive-Approximation ADCs, Part 2

  1. sandrad.jerome
    May 21, 2014

    I would like to appreciate your efforts for exploring this issue.

  2. samicksha
    May 22, 2014

    To avoid conversion errors, the average current required at a particular throughput should not cause the reference voltage to droop more than ½ LSB.

    Is it we can ignore the conversion errors…

  3. felixchristopher12
    November 21, 2014

    You have done a great job. I will definitely share it with my friends about this


  4. chirshadblog
    November 23, 2014

    It surely is and looks very informative. Im also sharing this. 

  5. BigM
    November 26, 2014

    This article and a couple of other reference materials (including the evalboard for AD7960) are calling for the AD8031 as being stable with high capacitive loads; the AD8031 datasheet has a different story on page 15 (chapter “DRIVING CAPACITIVE LOADS”); am I missing something?

    November 27, 2014

    @samicksha: Im kind of confused. Is there a particular percentage involved or has any direct impact towards it ? 

  7. AlanWalsh
    December 1, 2014

    Driving capacitors this large in the uFs is generally not an area that is covered in datasheets. In the datasheet they will talk about driving cap loads in the pFs to couple of nFs tops. What happens is that if you keep increasing the capacitor size into the uFs the opamp becomes so overdamped that it cannot oscillate and becomes stable again, at least for a DC type signal.

  8. BigM
    December 1, 2014

    Thank you for your points; very much appreciated.

    “They” – the opamp folks from Analog – may want to come forward with some technical papers about using the opamps with  high capacitive loads; this application is a fact and can't be ignored – if they still want to be trusted (just my narrow point of view).

  9. AlanWalsh
    December 1, 2014

    I don't think this is limited to our datasheets at ADI. I think you will find this info missing on competitor datasheets too. Generally most amplifier datasheets talk about the smaller cap loads (pF/nFs) but your point is taken.

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