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Clock and data recovery ICs ease optical network design

Targeting fixed-rate, multi-rate and continuous-tuning data communications and telecom applications, a new range of continuous-tuning clock and data recovery (CDR) integrated circuits (ICs)from Analog Devices is available. The pin-compatible ADN2813, ADN2814, ADN2815 and ADN2816 family of CDRs eases optical network design by providing the industry's widest performance margin beyond SONET jitter specifications.

Offered in a variety of price and power points to suit the entire range of networking applications at 1.25 Gbps (gigabits per second) and below, the new devices are pin-compatible with ADI's ADN2812, the industry's first fully automatic continuous-tuning CDR, introduced in 2003.

Unlike other CDR solutions that are designed for specific data rates or that require external control to identify a specific frequency or band of frequencies, the continuous-tuning capabilities of the ADN2813, ADN2814, ADN2815 and ADN2816 enable the devices to recover any incoming data pattern without external control or the use of a reference clock, allowing equipment developed today to accommodate changing bit rate requirements in the future. For optical engineers, this means they can develop a single design that can be standardized for use in multiple systems.

The new family of continuous-tuning CDRs provides jitter performance that beats the SONET specifications by more than a factor of three in all categories (jitter generation, jitter tolerance, jitter transfer). Their I2 C interface provides access to exclusive features such as data rate readback, which identifies the data rate of the incoming signal. The CDRs operate from a single 3.3 V supply.

Analog Devices , 92182 Antony Cedex, France

www.analog.com

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