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CMOS logic family brings robust ESD protection to battery-powered devices

Philips introduces Advanced Ultra-low Power CMOS logic family in industry’s smallest package
CMOS reduces power consumption and board space by more than 30 percent

San Jose, Calif.—Royal Philips Electronics today introduced its family of Advanced Ultra-low Power (AUP) CMOS logic, featuring ultra-low power consumption and offering more than 55 new products available in two package options, PicoGate and MicroPak™. The AUP family has the lowest power consumption available in a logic device, providing a 30 percent advantage over other families. This allows for extended battery life in devices such as cell phones, PDAs, digital still cameras and video players.

The electronics industry is moving toward more sophisticated electronic devices in increasingly smaller packages that require less power. The innovations inherent in the AUP family address these needs and make it easier for manufactures to design new applications for the home, personal, automotive and mobile markets. According to a recent market forecast published by industry research firm Insight Onsite, the 1.8V logic product market is expected to grow over 53 percent from 2006 to 2008—from 223 million in 2006 to 343 million in 2008—making this an ideal time for Philips to introduce the new AUP logic family.

“Forecasts show that the consumer electronics market will generate annual revenue in excess of US$38 billion by 2009, and the AUP market alone is expected to have a 27 percent compound annual growth rate from 2005 to 2009,” said Bruce Potvin, director of marketing, Logic Products Group at Philips Semiconductors. “Given these growth rates, it's easy to see why Philips is dedicated to bringing new advanced logic solutions to our customers so they can have the parts they need to easily develop compelling new products for the consumer electronics market.”

The AUP logic family comprises single, dual and triple gate functions housed in a 5-,6-, and 8-pin packaging allowing engineers to select the exact functions they require. Additionally, translation functions enable designers to easily interface between different voltage systems The AUP family also uses the newest MicroPak technology from Philips, which allows for migration from 0.50mm lead spacing to 0.35mm lead spacing, with the full release expected to take place by Q1 2006.

Furthermore, the AUP family provides higher Electrostatic Discharge (ESD) protection, making the logic devices less vulnerable to static electricity. Typical specifications for the AUP logic family are: operating voltage range 0.8V – 3.6V, propagation delays of 2.5n @ 2.5V and a Cpd = 4 pF or less.

Availability
Philips' AUP family of logic is available in production quantities. Additional information can be found at www.philips.com/logic.

The key feature in Philip Semiconductors' newest CMOS logic family is the level of electro-static discharge (ESD) protection the devices provide. In typical applications, logic devices offer ESD protection of 2-kV. The company has been able to more than double it to 5-kV.

“We offer more robust ESD protection compared with competitive families out there today,” said Bruce Potvin, director of marketing, Logic Products Group, Philips Semiconductors. “In today's ASIC market, companies that are doing ASIC design in portables are using process technologies at 90-nm and 65-nm. Those technologies don't provide good ESD performance. Our families are used to providing I/O translation in the customer's design.”

Philips' family of Advanced Ultra-Low Power (AUP) CMOS logic consists of single, dual, and triple gate functions housed in a 5-, 6- and 8-pin packages. This allows designers to select the required functions. Translation functions enable designers to easily interface between different voltage systems.

The devices will initially be available in single-gate functions.

Philips' AUP family also offers significantly lower power and reduces board space. Compared with competitive parts, both power consumption and board space are 30% lower, he said. Reducing power is pertinent for extending battery life in device such as cell phones, PDAs, digital still cameras and video players, all sectors Philips is targeting with its latest family of products.

The devices provide low static and dynamic power consumption across the entire Vcc range from 0.8-V to 3.6-V with a maximum supply voltage of 4.6-V. The family is optimized for low dynamic power consumption with CPD in the 3pF range.

Using Ioff, the devices are fully specified for partial power-down applications. The Ioff circuitry disables the output, which prevents damaging backflow current through the device when it is powered down.

He also said that the devices are 10% faster than existing technologies. The AUP family offers TPD of 3.2-ns and IOL of 2.2-mA at 1.8-V Vcc.

The devices also vary depending on the logic function. The family is comprised of buffers/drivers; flip-flops, including D-Type; gates, such as AND, NAND, OR, NOR, and exclusive-OR; and inverters. They also feature Schmitt trigger inputs for high noise immunity.

Packaging options
The AUP family is offered in two types of packages—MicroPak (XSON) and PicoGate. They are approximately ten times smaller than SO14 packages, making them suitable for portable applications, the company said.

MicroPak (XSON) is designed for use in portable applications and is approximately 65% smaller than the company's smallest PicoGate packages.

MicroPak technology allows the designer to migrate to 0.35-mm lead spacing from 0.50-mm. PicoGate Logic allows the designer to select the number of functions needed for a particular application.

“PicoGate technology allows the engineer to use a single gate or two gates or three gates in a package to do multiple functions, depending on what their needs are,” Potvin said. “It facilitates ease of use.”

Engineers can also make last minute changes to their ASIC designs, which reduces time to market. With these packages, ASIC designs can be modified without re-spinning logic. In addition, a gate or an inverter can be added to a design without having to redo the entire schematic.

MicroPak AUP devices will be available in the first quarter of 2006. The AUP family is available now for 25 cents each in 1,000-unit quantities.

Royal Philips Electronics, semiconductor division sales, 1-408-474-8142, www.semiconductors.philips.com.

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