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Analog Angle Article

Continuous-time, sigma-delta ADCs target noise, dynamic range, bandwidth “sweet spot” between SAR, pipeline architectures

Norwood, Mass. ‚Two new analog/digital converters (ADCs) from Analog Devices, Inc. provide 16-bit conversions, 86 dB of dynamic range, wide bandwidth, and low power for applications in wireless infrastructure, as well as medical data acquisition, and other instrumentation designs. Using a continuous-time, sigma-delta (CTSD) architecture that is positioned between the low-noise, limited bandwidth of successive approximation register (SAR) approaches and the wider bandwidth but lower-noise performance of pipelined designs, these converters also feature an input that looks like a simple 1-k&#937 resistor, thus simplifying and minimizing input-drive requirements.




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The AD9261 is a single-channel converter, while the AD9262 is a dual-channel converter. Both are 16 bit, 10 MHz bandwidth, 30 to 160 MSPS devices. Within each converter is a PLL clock multiplier, decimation filters, sample rate converters, and loop filter (which eliminates need for an anti-aliasing filter). The input is sampled after the loop filter, while oversampling and noise-shaping reduce in-band noise. The two-tone spur free dynamic range (SFDR) for the AD9262 is greater than 87 dBc with SNR of 84.5 dB to 10 MHz (15 dB noise figure). A related product, the AD9267 , includes only the 640 MSPS modulator core and PLL clock multiplier, to allow designers to offload signal processing to an FPGA or processor.

The Table summarizes the products and key specifications:




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Pricing and availability : All the converters are sampling now. Prices (1000 piece orders) are: $28 for the single-channel AD9261; $30 to $48 for the dual-channel AD9262, depending on version; and $40 for the AD9267 core.

For more information : contact Analog Devices, Inc, www.analog.com—Bill Schweber

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