CPRI SerDes delivers 800-ps fiber delay-calibration accuracy

Santa Clara, Calif.— National Semiconductor has developed the SCAN25100 CPRI (common public radio interface )SerDes, which integrates delay calibration measurements (DCM) circuitry to precisely measure basestation-to-remote radio heads (RRH) and RRH-to-RRH fiber delay components with a guaranteed ±800-ps of accuracy. The SCAN25100 CPRI SerDes can even track fiber delay changes as small as 200-ps.

The SCAN25100 CPRI is the only SerDes that complies to both the Low-Voltage and High-Voltage CPRI specifications, and provides automatic remote antenna head synchronization without using extra components such as external oscillators and jitter-cleaning clock synchronization chips.

The SCAN25100 exceeds all CPRI specifications by using National Semiconductor's extremely low noise serializer and deserializer PLLs, and analog intensive and robust serial CML I/O technology. By using these techniques, the SCAN25100 and SCAN12100 exceeds both the LV and HV jitter and output differential voltage requirements. Therefore, it interfaces to any CPRI base station and/or remote radio head from any manufacturer and over any medium (copper or fiber).

“There is also no other product, let alone SerDes, that delivers the ±800-ps delay calibration measuring-accuracy guarantee. Other vendors' products are either generic 8b/10b XAUI-like SerDes, or attempts at integrating the SerDes into a logic device,” said Dave Lewis, Product Marketing Manager, Interface, National Semiconductor. “These solutions are the ones that fall short of delivering the features and benefits that National Semiconductor's SCAN25100 CPRI SerDes delivers.”

In addition to full CPRI specification compliance for jitter and differential voltage levels, the device features automatic remote radio antenna head synchronization without additional expensive components (oscillators and jitter cleaners), the precision delay calibration measurements, and robust performance such as 8 KV ESD and hot plug protection.

National's SCAN25100 CPRI SerDes is available in 2457.6-, 1228.8- and 614.4-Mbits/s speeds. As an option, the SCAN12100, a reduced-speed 1228.8- and 614.4-Mbits/s version with the same features as the SCAN25100 is also available.

The SCAN25100 and SCAN12100 require no external reference crystal or oscillator and have a low phase noise output, which saves external clocking components. In addition, National offers a reference FPGA CPRI-framer-protocol code to its SCAN25100 and SCAN12100 customers.

“This optimized partitioning integrates the challenging analog SerDes, clocking and DCM functions into the SCAN25100 and SCAN12100 while a low cost reconfigurable FPGA (this already exists in the system so no need to add extra parts/cost) handles the logic functions. This system partitioning provides the highest jitter and timing performance while future-proofing the system design,” Lewis explained.

Delay calibration measurement: SerDes or FPGA?

Traditionally, the radio was part of the base station, and factory test equipment calibrated delays before shipment to the service providers. With remote radio heads, DCM needs to be done regularly (during normal operation) in the field. Then the base station manufacturers could only implement DCM in the FPGAs that talk to the SerDes, but this has significant performance shortcomings.

The FPGA measured accuracy is only 8 ns because it is done at the byte level rather than the bit level, which is how National's SCAN25100 CPRI SerDes does it. This can work for single hops with standard antennas, but does not future proof the design to support more than a single hop. Also, it does not support advanced antenna architectures such as transmit diversity and distributed MIMO/smart antenna arrays.

There are additional problems with implementing greater-accuracy DCM in FPGAs. There is the “FIFO slip” due to jitter from incoming and local clock domains that can throw measurement off by a byte clock cycle.

Also, if the delay is close to the length of a CPRI hyperframe, then the delay-counters can give false values or become metastable. The main problem with FPGA DCM is they are not performed at the serial pins. This means that there is a SerDes, even when integrated into the FPGA, between the FPGA DCM circuitry and fiber. This SerDes does not have deterministic delay or symmetrical serializer and deserializer delays, which makes the fibre delay measurements more complicated and less reliable.

For more information on the SCAN25100 CPRI SerDes or to order samples, visit For more information on the reduced-speed SCAN12100, visit

In 1,000-unit quantities, the SCAN25100 and SCAN12100 are priced at $14.60 and $10.05, respectively, and are available now.

National Semiconductor Corp., 1-800-272-9959,

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