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Custom Analog ICs: How to Avoid the Wrong Design

Many times when a custom analog IC design is undertaken, the design has already been realized on a PCB using off-the-shelf components. This is a good thing, but it can also be a bad thing if the ASIC design methodology is to simply transfer the same design from one platform (the PCB) to another (the ASIC).

In an earlier blog, I wrote about how the design of an analog IC is based on relative principles, rather than the absolute principles used on a PCB. For example, IC designers think about resistor dividers in terms of the ratio of one resistor to another, regardless of the absolute value of the resistor. This is because the absolute control of resistance is very limited on an IC, whereas lithography matching is very precise.

An even more common but wrong design principle is to assume that each circuit on the PCB can simply be translated over to the ASIC. This design methodology is not viable, because production yield statistics get in the way. As a result, the ASIC actually costs more, the performance will be worse, and the nonrecurring engineering will be higher.

Discrete analog functions available as standalone devices — for example, an op-amp or a voltage reference — have a specification based on the manufacturer's acceptable yield loss for that device. Also, with precision functions, manufacturers often grade the devices. For example, a voltage reference might be available with an actual voltage within a 0.5% tolerance or a 1% tolerance for a different price points. This same grading process can be applied to op-amps for specifications such as input offset voltage. To make matters worse, the process used to build a standalone function will be the optimum for performance, cost, or both.

Contrast all these issues with those of an ASIC. First, the ASIC is generally for one customer, so there is no opportunity to grade devices and sell the higher grades to other parties for more money. Second, multiple functions are collocated on a single process that is not optimum for each function on the original PCB design.

Unless the objective is simply to shrink the board design, a direct PCB-to-ASIC translation will almost always have a higher yield loss and be built on a more expensive wafer process. In extreme cases, one simply won't be able to execute the translation (i.e., include an 18-bit linear ADC on the ASIC). Finally, more functions on one IC means more opportunities for a single function to be out of specification, in which case the IC must be discarded. Consequently, the price for fully compliant parts must increase to make up for yield losses.

A simple way to see the claims above in action is to look at the performance specifications versus price for reconfigurable mixed signal devices, regardless of whether the configurability is via software or metal programming. If the devices don't cost more than an equivalent composite discrete solution — a highly unlikely situation — you can be assured the performance will be worse. Whereas it is almost impossible to find a discrete op-amp with offset voltages as bad as 7-9 mV and above, it is not uncommon to see op-amp and comparator offsets of 15 mV or more on feature-rich mixed signal devices.

The right way to design a custom analog ASIC is to write the design specification around the system-level objective. This enables ASIC circuit designers to utilize the advantages of an ASIC design methodology to arrive at a higher-performing and lower-cost solution. For example, most ASIC devices don't require a full-featured op-amp like a LM741. Many times a simple op-amp circuit with five or six transistors is acceptable and requires no internal compensation. Additionally, the ASIC supply voltage wouldn't have a range of 3-32 V, as with an LM324 op-amp. Usually it is one well-controlled voltage unique to the application.

A clever ASIC engineer can usually find a system methodology where the overall system precision is tied to a single statistical variable, rather than the composite of several discrete random variables. For example, functions such as auto-zeroed amplifiers with sub-millivolt offset voltages are relatively easy to implement on an ASIC for less than one-tenth of one cent — effectively free. Equivalent performance on a PCB would cost 100 times that.

As more and more standard product, system-level mixed signal ICs are introduced by traditional analog semiconductor manufacturers, the performance invariably improves, the price drops, and the time to market decreases. This is because those products are engineered based on the system objective. If one goes down the custom ASIC path, it is a good idea to mimic that proven approach. Those devices aren't simple amalgams of earlier functions.

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30 comments on “Custom Analog ICs: How to Avoid the Wrong Design

  1. PCR
    November 26, 2013

    Scott Thanks for the great article, I believe that this will be a great guide line to follow. 

  2. Bob F.
    November 26, 2013

    Hi Scott,

    Your comments are spot on! Converting an analog component ladened PCB into an ASIC requires careful consideration of the system requirements of the entire design.

    “An even more common but wrong design principle is to assume that each circuit on the PCB can simply be translated over to the ASIC.” I reality, using analog cell libraries is no different than using discrete analog functions. This is precisely where so many mixed-signal ASIC companies fail to deliver a quality product. If you try to replicate the Analog portion of a customer's design using analog cell libraries, as most mixed signal ASIC suppliers do, you will end up with compromises, because rarely will any cell be EXACTLY what is needed in that part of the design. The analog cell is either overkill or under kill for what is really needed. This precisely why analog ASICs that are hand crafted…meaning full custom designs…have a near 100% track record of first pass success…while cell based analog ASICs often require multiple passes to achieve success…and many never do.

  3. Scott Elder
    November 26, 2013

    Thanks for reading!

  4. Scott Elder
    November 26, 2013

    Hi Bob – I remember the days of standard cell analog in the 1980s.  Every manufacturer had their own library of cells, but, as you commented, invariably none of them ever fit the application without modification.  They were merely starting points at best, which probably explains why that methodology has pretty much dissappeared.  Thanks for reading and commenting!

  5. Bob F.
    November 27, 2013

    You'd be surprised by the numer of customers we see who have thrown up their hands in disgust because the analog portion of their ASIC doesn't work properly. We look into it and sure enough, mostly just poor analog design, but the second biggest issue is that their supplier was really a digital house with claims of mixed signal capability becasue they have access to an analog cell library.

     

    Too bad there isn't some global metric… like being a doctor before you can practice medicine… that chip companies need to achieve before claiming analog capability.

  6. samicksha
    November 27, 2013

    Thanx Bob, Major difficulties are often a result of the layout software used to develop the interconnect.

  7. Bob F.
    November 27, 2013

    Layout is certaimly more difficult with high performance analog…but many of the jobs we get that are re-do of someone elses attempt are mostly  the result of just a poor understanding of analog design.

  8. samicksha
    November 28, 2013

    mixed-signal IC requires a high level of expertise to make it fit for specific purpose and use of CAD tools, but one thing which needs way out is fast changing digital signals which send noise to sensitive analog inputs…

  9. Victor Lorenzo
    November 28, 2013

    Taken apart, digital design and analog design are both challenging, and mixed design complexity at chip scale pushes those challenges and expetice requirements to the limit.

    Good and precise CAD/CAE tools are indeed required and help on solving complex problems, but real field experience and that magic wand that comes with many many years of practice are what make the tools realy usefull.

    Most of the times, at least in high speed digital/analog design, real components behaviour (including the most important component which is the PCB) deviate from theoretical values obtained during design and simulation. Precise component models are of course key factors in reducing this deviation.

  10. goafrit2
    November 28, 2013

    >>  If one goes down the custom ASIC path, it is a good idea to mimic that proven approach. 

    That is what everyone does. Take a look at all the ADCs in the market. You will notice the difference is the “minor invisible things” but the design strategy is largely the same. Some have superb core competence in making great circuits in varying processes where others struggle.

  11. fasmicro
    November 28, 2013

    >> “An even more common but wrong design principle is to assume that each circuit on the PCB can simply be translated over to the ASIC.”

    That assumption derailed my graduate program when I was tasked to miniaturize a PCB board for a medical system. It turns out that finding a better way of holding charges which a 1pC cap does in a board can be a huge challenge monolithically. We fail to that trap always and continue to do.

  12. fasmicro
    November 28, 2013

    >> This precisely why analog ASICs that are hand crafted…meaning full custom designs

    My old boss liked to handcraft his digital cell. I mean you make layouts as you do analog – no digital automation using verilog and VHDL. While I find that funny, it does work for him. He hates the nexus of someone dumping a cell in his design which he does not understand. It gets worse if you have to ask memory selling firms like Microchip to send to TSMC some cells to be dumped (they will never give that to you) inside a design. When it comes back, you will realize it is not that easy. 

  13. fasmicro
    November 28, 2013

    >>   Every manufacturer had their own library of cells, but, as you commented, invariably none of them ever fit the application without modification

    Now, floating gate based analog memories are making rounds for that type of libraries. Making them is very challenging, so few companies that can do them can sell the IP.

  14. fasmicro
    November 28, 2013

    >> that chip companies need to achieve before claiming analog capability.

    I am not sure we can expect that level of purity under capitalism. It is left to the customer to make sure it is engaging and hiring the right design house. Most firms look at companies previous records before engaging them in designs. And that is one of the reasons ASIC industry cannot easily be disrupted and you do not have a lot of entrepreneurial evolutions in it. It is closed and also reputational-based because it involves a lot of capital. Nokia cannot take up an unknown entity for its ADC supply because of say cost, but it can take up the software if one college grad makes a really good one like bundling Facebook in its phones.

  15. fasmicro
    November 28, 2013

    >>  Major difficulties are often a result of the layout software used to develop the interconnect.

    I do not understand this comment. Could you explain this in another way. You use the same software to make the transistor as the interconnect. So, how does that change the game? Not sure software is the problem – Cadence is a good one. The problem is lack of basic analog design skills.

  16. Bob F.
    November 28, 2013

    Fasmicro,

     

    “It is left to the customer to make sure it is engaging and hiring the right design house. Most firms look at companies previous records before engaging them in designs.”

     

    You've hit on another problem here…hiring a “design house”. The success of ASICs, expecially analog ASICs, relies on a seemless relationship between the designer (design house) and foundry. Too often, companies think that they can manage the manufacturing side, so all they outsource is the design. This can be a BIG problem…when something goes wrong there is lots of finger pointing…is it the design of the process the created the problem. 

    You are always better off using a full service model… design thru silicon production. These full service, fabless semiconductor companies are then responisble for quality and reliability and yield.

  17. Scott Elder
    November 28, 2013

    When it comes to oursourcing engineering I would recommend that the outsourcer always insist on meeting the lead design engineer on the project.  And bring along your own expert/consultant, who has no vested financial interest in the production, to the “interview”.

    Lawyers have a saying that goes, “Pay me now or pay me later, but you will pay me.  And if you pay me now, it will always be cheaper.”  Here they are referring to resolving issues up front with a good contract.

    What that means in outsourced engineering is that when you start with a project, bring along the expertise to check things out in the beginning and for periodic design reviews.  Don't wait till the project is done and it is a disaster and both parties start pulling out the contract paperwork.

  18. SunitaT
    November 30, 2013

    but real field experience and that magic wand that comes with many many years of practice are what make the tools realy usefull.

    @Victor, totally agree with you that field experince is very crucial for diong analog and mixed signal design. As we are shrinking the transistor sizes this complexity is also increasing. Its becoming more and more difficult to implement the system in newer technologies.

  19. SunitaT
    November 30, 2013

    Not sure software is the problem – Cadence is a good one. The problem is lack of basic analog design skills.

    @fasmicro, agreed. Cadence is very good tool to implement this. Earlier cadence was providing just layout tools but offlate they have released many more tools like inbuilt auto-route tools which increases the efficiency because we dont have to port data from one tool to another.

  20. SunitaT
    November 30, 2013

    My old boss liked to handcraft his digital cell


    @fasmicro, every time handcrafting digital cell is not a good idea. I think its better to build a digital library which can be used as reference for all the projects. Lets not forget that designing a digital cell which has optimal area,power and delay numbers is not an easy task.

  21. SunitaT
    November 30, 2013

    Layout is certaimly more difficult with high performance analog

    @Bob, totally agree with you. Issues like matching, shielding, area optimization etc makes analog layout implementation very difficult. This is the reason its hard to automate analog layouts.

  22. amrutah
    December 1, 2013

    @Sunitat @fasmicro: I agree too, the Cadence Encounter routing tool is one such thing.  For Encounter Digital Implementation (EDI), it uses the inbuilt Cadence Assura QRC extraction for the parasitic information and then auto-route to complete the layout design. It increases the efficiency as there is no need to port databases to support multiple tools and to some extent reduces the cost as everything gets done by one tool.

       Another advantage is we can have any shape for the digital implementation around the core Analog design.

  23. Davidled
    December 1, 2013

    They need to do follow-up meeting every week or biweekly to get the status of project. Therefore, disaster could be avoided. I expect that they would get the some type of process between customer and client to reach the goal among them. Contract paper may not indicate the engineering process. Only this process is lead by engineer who is involved in the design.

  24. amrutah
    December 1, 2013

    @SunitaT: Yes it is hard to automate analog layouts. But Magma had developed tools like Titan AVP and Titan SBR (patent pending) which can auto-route according to specification and constraints.  I don't know what happend to these tools after Synopsys acquired Magma.

  25. fasmicro
    December 3, 2013

    >> Too often, companies think that they can manage the manufacturing side, so all they outsource is the design. 

    Very nice insight – I have never thought that could be a problem. Apparently, it will be best to minimize outsourcing of design so that both design and manufacturing can work in sync. But notice that someone must have the opportunity to blame the order guy. If production cannot blame design and vice versa, life will lack fun! Those in the industry will understand when a wafer comes back with bad chips!

  26. goafrit2
    December 3, 2013

    Scott has a lot of real practical insights on ASIC design. Very nice piece. Increasingly, we are seeing more like him outside this nation as companies continue to outsource mixed signal design to Asia.

  27. goafrit2
    December 3, 2013

    Cadence still offers many of those cells, though mainly for digital cells. Only a really lazy engineer will depend on analog cells to make a decent design in this age when every spec must be optimized to the bone.

  28. goafrit2
    December 3, 2013

    >> but one thing which needs way out is fast changing digital signals which send noise to sensitive analog inputs…'

    You can use shielding or guard rings to protect critical signal lines. The art of mixed signal is one that gets better with gray hair. Yes, I have never seen a better job where experience is hugely valuable. You need to have done many of these designs to have a real chance in executing a great produce.

  29. goafrit2
    December 3, 2013

    >>  they have released many more tools like inbuilt auto-route tools which increases the efficiency because we dont have to port data from one tool to another.

    Be very careful with Cadence auto-route tool. In short, from Altium Protel to Cadence to Synopsis, autorouting is never a good idea. They rarely offer optimization which balances your space and signal quality. I see them as marketing features – you sell things because they are there though few will need to use them.

  30. goafrit2
    December 3, 2013

    >>  Lets not forget that designing a digital cell which has optimal area,power and delay numbers is not an easy task.

    Perhaps, that could be the main reason why you need to handcraft. The fact is this, auto-routing will never be better than handcrafting. Yes, I agree that it is waste of resources to make digital layouts with hand. But people that want the best quality do that. There is a cost to benefit analysis here – if you are working in medical device where any small spec improvement is money, it could be a good idea. I will not do it, I mean, handcrafting digital blocks.

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