Cypress expands PSoC’s programmable and precision analog capabilities

Cypress Semiconductor Corp. (San Jose, Calif.) has just introduced two new architectural platforms to its popular PSoC programmable system-on-chip family. Building on an installed base of some half a billion 8-bit PSoC 1s, PSoc 3 is a higher performance 8-bit device, based on an 8051 processor with up to 33 MIPS, whilst the PSoC 5 has a 32-bit ARM Cortex-M3 processor at its heart, giving designers up to 100 DMIPS to work with.

Like the PSoC 1, PSoC 3 and PSoC 5 are designed for very low power applications – they can both be powered by a single solar cell. The PSoC 3 consumes 1mA when active and 1uA in sleep mode, whilst the PSoC 5 draws 2mA in active mode and 2uA when sleeping. In hibernation, they consume 200nA and 300 nA respectively. Operating voltage spans the 0.5V to 5.5V range.

'No excuses analog' is the term coined internally for these devices, according to Jim Davis, a senior engineer at Cypress Semiconductor. He explains: “In the past, fpgas would have some analog in them, but they were excuse-ridden in terms of their performance. We have raised the bar with highly precise, very accurate analog, plus very programmable digital capabilities and increased connectivity, with these now incorporating CAN, LIN and I2S.”

Chief among the PSoC 3 and PSoC 5's features are a selection of dedicated precision data converters, plus configurable blocks of analog, digital, and interconnect circuitry – how much programmable fabric depends on the application you have in mind, as there are numerous variants of both product families available. Within the analog subsystem there are one or two 12-bit SAR ADCs with sample rates to 1ms/s, up to a 20-bit delta sigma ADC, four 8 to 12-bit DACs, plus the ability to implement one to 50 programmable gain amplifiers, mixers, op amps and more. Designers can choose from libraries of tested analog and digital peripherals that are common throughout the PSoC 3 and 5 architectures, facilitating migration between 8-, 16- and 32-bit applications. There's also a DSP-like digital filter that meets demand within the instrumentation and medical signal processing arena, according to Cypress. Finally, there's an accurate in-chip voltage reference at +/- 0.1%.

On the digital side, the PSoC's have what's known as Universal Digital Blocks (UDBs), each of which is equivalent to a small 8-bit processor. Davis explained: “There is a data path, control registers, pld, logic within each block. And there's integrated routing throughout them, so you can merge data paths together, merge digital logic together … you don't have to worry about how to connect them.” There are also four optimised blocks for implementing commonly used digital components, such as timers, counters and PWM.

The PSoC architecture boasts time to market, integration and flexibility advantages. But Davis added another consideration: “One unique feature of PsoC is the ability to have IP protection in the design itself. You don't have all these discretes laid out on the board itself. All the unique functionality of the chip gets swallowed up in flash and then we implement a multi-level security architecture within the PSoC device for the security of that flash.”

With analog capability spanning the range from thermocouples (near DC voltages) to ultrasonic signals, PSoC's addressable market has certainly expanded dramatically. The latest peripherals enable a wide range of functions to be performed, such as motor control, battery management, human interface technologies, LCD segment display, graphics control, audio/video processing and communications protocols. Cypress believes the total available market for PSoC products now stands at around $15billion, and includes industrial, medical, automotive, communications and consumer equipment applications. Notably, Cypress' CapSense touch sensing technology is among the options available.

A key element to fostering PSoC's programmable design methodology is the accompanying design software, intimated Davis. With 20,000 gates of programmable logic within the PSoC 3 and 5 architectures, Cypress started from the ground-up to create the PSoC Creator Integrated Development Environment (IDE). The software takes a graphical approach, providing a library of pre-configured analog and digital peripherals that users can drag and drop into a schematic-based design viewer. The tool automatically routes signals and apparently, can direct I/O to the optimum pins if required, though any pin can serve any analog or digital peripheral. There's the opportunity to create customised IP and save it in a library for future reuse, or to share within an organisation. Cypress also hopes that PSoC will attract the attention of third-party developers and open-source communities to develop devices for the PSoC 3 and 5. The company is currently busy developing a PSOC marketplace with this in mind.

Cypress already has agreements in place to offer free compilers for both the PSoC 3 and 5 families. The Keil CA51 Compiler for PSoC 3 and the GNU GCC-ARM compiler are bundled with Creator, which also includes a debugger to support on-chip debug and trace functionality. Among the RTOS to be supported are Keil RTX51Tiny, Micrium mC/OS-II and SEGGER emboss, though more will be added in the future said Davis.

Samples of the PSOC 3 and PSoC 5 are available, though full production is expected to start in the first quarter of 2010. To help engineers get started on the new devices, Cypress is offering two design kits – the PSoC 3 FirstTouch starter kit, plus the PSoC Development Kit, which supports the entire PSoC line. For more details, visit

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